Special Coverage

Converting from Hydraulic Cylinders to Electric Actuators
Automating Optimization and Design Tasks Across Disciplines
Vibration Tables Shake Up Aerospace and Car Testing
Supercomputer Cooling System Uses Refrigerant to Replace Water
Computer Chips Calculate and Store in an Integrated Unit
Electron-to-Photon Communication for Quantum Computing
Mechanoresponsive Healing Polymers
Variable Permeability Magnetometer Systems and Methods for Aerospace Applications
Evaluation Standard for Robotic Research

Enhanced Reporting of Mars Exploration Rover Telemetry

Figure 1. This top view of a METERS Auto-Generated Main Web Pageincludes a motion summary in plain textMars Exploration Rover Enhanced Telemetry Extraction and Reporting System (METERS) is software that generates a human-readable representation of the state of the mobility and arm-related systems of the Mars Exploration Rover (MER) vehicles on each Martian solar day (sol). Data are received from the MER spacecraft in multiple streams having various formats including text messages, sparsely-sampled engineering quantities, images, and individual motorcommand histories. Typically, only parts of this data generated on Mars are received the same day they were created, so the summary report tools have to work well even when data is missing. All information is grouped by type into easilybrowsable Web pages (see Figure 1).

Posted in: Briefs, Software, Data acquisition and handling, Telemetry, Autonomous vehicles, Spacecraft
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Facilitating Analysis of Multiple Partial Data Streams

Robotic Operations Automation: Mechanisms, Imaging, Navigation report Generation (ROAMING) is a set of computer programs that facilitates and accelerates both tactical and strategic analysis of time-sampled data — especially the disparate and often incomplete streams of Mars Explorer Rover (MER) telemetry data described in the immediately preceding article. As used here, “tactical” refers to the activities over a relatively short time (one Martian day in the original MER application) and “strategic” refers to a longer time (the entire multi-year MER missions in the original application).

Posted in: Briefs, Software, Analysis methodologies, Data acquisition and handling, Telemetry, Autonomous vehicles, Spacecraft
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Service-Oriented Architecture for NVO and TeraGrid Computing

The National Virtual Observatory (NVO) Extensible Secure Scalable Service Infrastructure (NESSSI) is a Web service architecture and software framework (see figure) that enables Web-based astronomical data publish - ing and processing on grid computers such as the National Science Foun - dation’s TeraGrid. Charac ter istics of this architecture include the following:

Posted in: Briefs, TSP, Software, Architecture, Computer software and hardware, Data acquisition and handling
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Mars Reconnaissance Orbiter Wrapper Script

Mars Reconnaissance Orbiter on the launch padThe MRO OLVM wrapper script software allows Mars Reconnaissance Orbiter (MRO) sequence and spacecraft engineers to rapidly simulate a spacecraft command product through a tool that simulates the onboard sequence management software (OLVM). This script parses sequence files to determine the appropriate time boundaries for the sequence, and constructs the script file to be executed by OLVM to span the entirety of the designated sequence. It then constructs script files to be executed by OLVM, constructs the appropriate file directories, populates these directories with needed input files, initiates OLVM to simulate the actual command product that will be sent to the spacecraft, and captures the results of the simulation run to an external file for later review. Additionally, the tool allows a user to manually construct the script, if desired, and then execute the script with a simple command line.

Posted in: Briefs, Software, Computer simulation, Computer software and hardware, Spacecraft
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Modeling System Architecture and Resource Constraints Using Discrete-Event Simulation

Optimizing system resource utilization is a key design objective for system engineers in communications, electronics, and other industries. System resources such as processors, memory, or bandwidth on a communication bus are often shared by various components in the system. To understand the utilization of a shared resource, system engineers must do two things: they must identify constraints on the resource, such as number of processors and memory size, and they must analyze the effect of input traffic or load on the shared resource.

Posted in: Articles, Articles
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RapidIO vs. Ethernet A Practical Technical Comparison

Ethernet is currently the incumbent backplane technology across a wide range of storage, wireless, wireline, military, industrial, and other embedded applications as developers move away from proprietary implementations in an effort to reduce development time and cost while increasing performance and functionality. However, as data rates increase, it has become apparent that many high-performance applications exceed the limits of this traditional protocol. Designing an efficient embedded backplane interconnect with excellent performance requires addressing a number of key design challenges, including header efficiency, protocol processing efficiency, effective bandwidth, and quality of service while strictly managing cost. To meet these challenges, many developers are turning to RapidIO® technology as an alternative to Ethernet.

Posted in: Articles, Articles
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Designing Software Radio Systems With FPGAs

Software defined radio technology has been widely adopted for new military and aerospace platforms, government signal intelligence and homeland security systems, and now more extensively in commercial wireless voice and data networks as well. These modern communication systems need to squeeze more channels of traffic into an expensive slice of precious radio spectrum. Military and government requirements for secure communications mandate real-time encryption and decryption schemes that must be increasingly more resistant to interception. In multinational theater of war combat operations, communications systems must selectively ensure certain specific links and reliably deny others.

Posted in: Articles, Articles
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Front Panel Hardware Considerations For ATCA, AMC, and MicroTCA Telecom Equipment

Acceptance of telecom industry standards for rack-mounted server equipment — in the form of the PCI Industrial Computer Manufacturer’s Group (PICMG) standards — is gaining momentum throughout global market channels. The objectives of those standards are certainly attractive in terms of streamlining economy and efficiency for both carriers and telecom equipment manufacturers across a number of areas. Their aim is to reduce development time and costs, as well as to help reduce the total cost of ownership. They are also intended to offer high levels of modularity and configurability while delivering high levels of service availability (99.999% and greater) and supporting appropriate scalability of system performance and capacity.

Posted in: Application Briefs, Application Briefs
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System-On-Module Standard

MEN Micro Inc. (Ambler, PA) has announced the ESMexpress® System-On-Module Standard, a new computing standard in development to be the ANSIVITA 59 (RSE Rugged System- On-Module Express) standard. In conjunction with the new standard, they have also an - nounced the XM1 featuring the first-generation Intel® Atom® processor (Z530 at 1.6 GHz or Z510 at 1.1 GHz) based on 45-nm technology coupled with 1 GB of soldered DDR2 SDRAM for significantly lower power dissipation, reduction in design costs, and space-saving design flexibility. ESMexpress combines this model with advanced cooling technologies, and the latest serial buses and rugged components to ensure safe, reliable operation in harsh environments found in areas as diverse as the railway, avionics, industrial automation, medical engineering and mobile industries.

ESMexpress provides for extreme resistance against shock and vibration. Eight screws secure the module to the carrier board. In addition, a mechanically robust connector specified for MIL and railway applications supports differential signals with up to 8 GHz, features a stacking height of 5 mm with a minimum tolerance of +/-0.3 mm, is equipped with fixed contacts for power supply, and is specified for an operating temperature range of -55°C to +125°C. The Intel-based XM1 offers a screened temperature range of -40°C to +85°C. The electrical signals are distributed on two 120-pin connectors and are only defined for modern serial buses. For PCI Express there are four single lane ports (4 ×1) and one port that can be configured as 1 ×16, 1 ×8, 2 ×4 or 2 ×1. Other ports include three 1-Gigabit Ethernet (also as 10- Gigabit), eight USB, three SATA, SDVO, LVDS, HD Audio, several utility signals, and a single 12V power supply.

For Free Info Visit Here.

Posted in: Products, Products
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FPGA Mezzanine Card Module

VMETRO (Houston, TX) has released a FPGA Mezzanine Card (FMC/VITA 57) module. The ADC510, available in air-cooled and conduction- cooled rugged versions, integrates two 12-bit 500MHz A/D chips for use in DSP applications such as signal intelligence (SIGINT), electronic counter measures (ECM), and radar. This design, based on the emerging VITA 57.1 standard, makes it easier for developers to integrate FPGAs into their embedded system designs.

The ADC510 supports two Texas Instruments ADS5463 ADC devices, with each device supporting a sampling rate up to 500 MSPS and providing 12-bits of digital output. The ADC device interfaces are routed to the FMC connector to enable an FPGA on a baseboard to directly control and receive data. There is a choice of sample clock sources for the ADC510 including an onboard source that supports sampling rates of 300, 320, 400, and 500 MSPS as well as the ability to utilize an external sample clock. Input and output triggers are provided to enable multiple ADC510 modules to be synchronized to increase the number of input channels.

For Free Info Visit Here.

Posted in: Products, Products
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