Home >> Tech Briefs

Archive for January, 2009

Photographing the Inauguration

Posted January 30th, 2009 by admin

Over a million people attended the inauguration of President Barack Obama in Washington last week. With extremely tight security restricting access, photographer David Bergman found an ingenious way to photograph the event, with the help of imaging technology used on the Mars Rover.

According to an article on his blog, Bergman clamped a Gigapan imager – a robotic camera used on the Mars Rover to photograph the Martian landscape- to the railing on the north media platform about six feet from his photo position. The camera enabled Bergman to take multiple images and stitch them together. The panoramic image of the event is contained in a file measuring 1.5 Gigapixels (59,783 X 24,658 pixels) in size.

The Gigapan technology was developed by researchers at Carnegie-Mellon University and NASA, under the Global Connection Project. More information on Gigapan can be found by clicking here.

To view the image of the inauguration, click here.

advertisement:

Stretchable Electronics

Posted January 29th, 2009 by admin

A design for bendable electronic devices produces parts that can be wrapped around complex shapes, without reducing electronic function. The technology is based on semiconductor nanomaterials that offer high stretchability and large twistability. Potential uses include electronic devices for eye cameras, smart surgical gloves, body parts, airplane wings, back planes for liquid crystal displays, and biomedical devices.

The technology comprises silicon islands on which the active devices or circuits are fabricated. The islands form a chemically bonded, pre-strained elastomeric substrate. Releasing the pre-strain causes the metal interconnects of the circuits to form arc-shaped structures, which accommodate the deformation and make the semiconductor materials more stretchable, without inducing significant changes in their electrical properties.

“Our design is of great interest because the requirements for complex shapes that can function during stretching, compression, bending, twisting and other types of extreme mechanical deformation are impossible to satisfy with conventional technology,” said Jizhou Song, a professor in the University of Miami College of Engineering and one of the technology’s developers.

Learn more here.

Ice-Free Power Lines

Posted January 28th, 2009 by admin

Scientists from Dartmouth College and Ice Engineering LLC have invented a way to cheaply and effectively keep ice off power lines. Called a variable resistance cable (VRC) de-icing system, the technology switches the electrical resistance of a standard power line from low to high. The high resistance automatically creates heat to melt ice build-up, or keeps it from forming in the first place.

“The beauty of the VRC system is that it’s fully customizable and is an affordable addition to the current manufacturing and installation process,” said Gabriel Martinez, Ice Engineering’s Vice President, who worked with Dartmouth Professor Victor Petrenko on the project. Martinez added that manufacturing and installation changes required to implement the VRC system would result in a less than 10 percent increase in overall cost.

Moreover, the life span of the de-icing system would match or exceed the life-span of the utility cable, approximately 30-50 years. The system would pay for itself during the next storm by practically eliminating the cost of fixing downed cables and power outages due to ice and snow, according to Martinez. Another benefit is that utility companies using the system would have full control over its functionality. Time, temperature, and location can all be adjusted manually, or be set and controlled automatically with electronic sensors.

Click here to learn more.

Sensing Broken Bridges

Posted January 27th, 2009 by admin

Northeastern University was recently awarded a $9 million federal research grant to develop new multi-sensor technology systems for cars and trucks that will allow for real-time assessment of road and bridge infrastructure across the country. Northeastern will lead the five-year VOTERS (Versatile Onboard Traffic Embedded Roaming Sensors) project along with a range of government, industry, and academic partners.

The need to restore and maintain urban infrastructure is identified by the National Academy of Engineering as an engineering Grand Challenge for the 21st century. The well publicized American Society of Civil Engineering (ASCE) 2005 Report Card gave the nation’s infrastructure a grade of D, estimating that a $1.6 trillion investment was required to address basic needed repairs.

The project team will equip vehicles, such as city buses, with innovative multi-sensor technology systems that monitor surface conditions while the vehicle is in motion. The sensors will utilize acoustics and radar to monitor the roads and bridges under real driving conditions, looking for potholes and cracks in the concrete and other abnormalities that require repair. Computers installed in the vehicles will control the sensors and a GPS system will pinpoint the collected data to very precise locations. Constant streams of data will be processed and reported back to base stations using a cellular phone system, which will then be analyzed so that timely repairs can be made in vulnerable areas.

Read more here.

When More Is Less

Posted January 26th, 2009 by admin

According to research performed at Sandia National Laboratories, the current trend of increasing the speed of supercomputers by increasing the number of processor cores on individual chips may actually worsen performance for many complex applications. A Sandia team simulated key algorithms for deriving knowledge from large data sets. The simulations show a significant increase in speed going from two to four multicores, but an insignificant increase from four to eight multicores. Exceeding eight multicores causes a decrease in speed. Sixteen multicores perform barely as well as two, and after that, a steep decline is registered as more cores are added.

The problem is the lack of memory bandwidth, as well as contention between processors over the memory bus available to each processor. The memory bus is the set of wires used to carry memory addresses and data to and from the system RAM. To use a supermarket analogy, if two clerks at the same checkout counter are processing your food instead of one, the checkout process should go faster. Theoretically then, being served by four clerks, or eight clerks, or sixteen should further improve performance. The problem is, if each clerk doesn’t have access to the groceries, he or she doesn’t necessarily help the process. Worse, the clerks may get in each other’s way. The same concept apparently applies to processor cores.

According to a simulation of high-performance computers by Sandia’s Richard Murphy, Arun Rodrigues, and former student Megan Vance, the lack of immediate access to individualized memory caches – the “food” of each processor – slows the process down instead of speeding it up once the number of cores exceeds eight. “To some extent, it is pointing out the obvious,” admitted Rodrigues. “Many of our applications have been memory-bandwidth-limited even on a single core. However, it is not an issue to which industry has a known solution, and the problem is often ignored.”

Read the full story here.

>> Newsletter

Subscribe today to receive the INSIDER, a FREE e-mail newsletter from NASA Tech Briefs featuring exclusive previews of upcoming articles, late breaking NASA and industry news, hot products and design ideas, links to online resources, and much more.

Your name:

Your email:

Please Subscribe me to the Insider