Low-Power Quantum Computers
- Created on Monday, 12 December 2011
By 2017, quantum physics will help reduce the energy consumption of computers and cellular phones by up to a factor of 100. For research and industry, the power consumption of transistors is a key issue. The next step will likely come from tunnel-FET, a technology that takes advantage of a phenomenon referred to as quantum tunneling. At the École Polytechnique Fédérale de Lausanne (EPFL) in Switzerland, research is well underway.
Today's computers have at least a billion transistors in the CPU alone. These small switches that turn on and off provide the famous binary instructions, the 0s and 1s that let us send emails, watch videos, and much more. The technology used in today’s transistors is called field effect - whereby voltage induces an electron channel that activates the transistor. But field effect technology is approaching its limits, particularly in terms of power consumption.
Tunnel-FET technology is based on a fundamentally different principle. In the transistor, two chambers are separated by an energy barrier. In the first, a horde of electrons awaits while the transistor is deactivated. When voltage is applied, they cross the energy barrier and move into the second chamber, activating the transistor in so doing.
In the past, the tunnel effect was known to disrupt the operation of transistors. According to quantum theory, some electrons cross the barrier, even if they apparently don't have enough energy to do so. By reducing the width of this barrier, it becomes possible to amplify and take advantage of the quantum effect – the energy needed for the electrons to cross the barrier is drastically reduced, as is power consumption in standby mode.
“By replacing the principle of the conventional field effect transistor by the tunnel effect, one can reduce the voltage of transistors from 1 volt to 0.2 volts,” explains Adrian Ionescu, an EPFL researcher. In practical terms, this decrease in electrical tension will reduce power consumption by up to a factor of 100. The new generation microchips will combine conventional and tunnel-FET technology. “The current prototypes by IBM and the CEA-Leti have been developed in a pre-industrial setting. We can reasonably expect to see mass production by around 2017.”