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Sub-Nanosecond, Compact, Low-Power Time-Interval Measurement

This innovation is a sub-nanosecond time-interval measurement that is compact and inexpensive, implemented in a field-programmable gate array (FPGA). Currently, high-speed count ers or semi-custom or custom ASICs (application specific integrated circuits) are used for time-interval measurements. They are not nearly as powerful for automatic delay control for the environment (manufacturing, temperature, voltage, aging, and radiation).

This FPGA has the capability to perform in a spaceflight system, offering better performance than simple high-speed counting while consuming less power, with a smaller footprint, and no custom IC design or manufacture required.

The dedicated carry chain in modern FPGAs is exploited in this system. By adding 111111 to 000000, sending the START pulse to the carry-in input of the adder, and the STOP pulse to a register capturing the output of the adder, a thermometer code is stored. This “temperature” is a direct indicator of time. Since the dedicated carry chains are implemented in hardware without any programmable elements (e.g., antifuses, pass transistors), the “temperature” (time) resolution is fine. Hand layout and careful use of low-skew clocks is required for linearity. In modern FPGAs, as of this writing, resolutions can range from around 50 to 150 ps. For “maintenance,” the period of the external high-accuracy clock is measured, giving a calibration factor; the measurement string can be either independent on the same chip, or time-shared.

This work was done by Richard Katz of Goddard Space Flight Center. GSC-16124-1

This Brief includes a Technical Support Package (TSP).

Sub-Nanosecond, Compact, Low-Power Time-Interval Measurement (reference GSC-16124-1) is currently available for download from the TSP library.

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