HALT Technique to Predict the Reliability of Solder Joints in a Shorter Duration
- Created: Friday, 01 August 2014
This methodology can reduce product development cycle time for improvements to packaging design qualification.
NASA’s Jet Propulsion Laboratory, Pasadena, California
The Highly Accelerated Life Testing (HALT) process subjects test articles to accelerated combined environments of thermal, dynamic, voltage, and current to find weak links in a given product design. The technique assesses fatigue reliability of electronic packaging designs used for long-duration deep space missions by testing using a wide temperature range (–150 to +125 °C), and dynamic acceleration range of up to 50g. HALT testing uses repetitive, multiple-axis vibration combined with thermal cycling on test articles to rapidly precipitate workmanship defects, manufacturing defects, and thermal cycling-related weak links in the design. This greatly reduces the product development time by rapidly finding problems and qualifying the packaging design quickly. Test vehicles were built using advanced electronic package designs using the surface mount technology process.
The HALT technique has been used to predict the survivability of selected advanced packages [surface mount packages such as ball grid arrays (BGA), very thin chip array ball grid arrays (CVBGA), quad flat pack (QFP), micro-lead-frame (MLF) packages, and several passive components] during a shorter test.
All of the advanced electronic packages were daisy-chained independently to monitor the continuity of the individual electronic packages. Continuity of the packages was monitored during the HALT testing using a dedicated data logging system. This innovation allowed users to test the board to up to 50g shock levels, and temperatures of +125 to –150 °C, and also different combinations of these factors. The equipment system can deliver 50g at room temperature, but the highest g levels were lower than it can deliver, especially at the extremes of the cold temperatures tested.
Several tests were performed by subjecting the test boards to various g levels, dwell durations, and the hot and cold temperature levels. Several of the advanced electronic packages showed signs of continuity problems, including plastic ball grid arrays (PBGAs), BGAs, MLFs, and QFPs. The PBGA package circuit became completely open while others showed signs of continuity variations that could lead to failures if the tests were conducted further. The failure of the PBGA occurred within 12 hours of accelerated testing using dynamic and thermal loads.
In comparison, the PBGA package failed a thermal-cycle-only test with a temperature range from –150 to +125 °C, after 959 thermal cycles. Each thermal cycle took about 2.33 hours, and a total test-time-to-fail PBGA was 2,237 hours (or ≈ 3.1 months) due to thermal cycling fatigue alone.
Further research efforts are in progress to understand the HALT processes PBGA and other packages.
This work was done by Rajeshuni Ramesham of Caltech for NASA’s Jet Propulsion Laboratory. NPO-49182
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