Cumulative Timers for Microprocessors
- Created on Wednesday, 01 August 2007
The internal implementation would function similarly to the external implementation, except that the serial number and the prescaler-reduced count of clock cycles would be stored in either (1) part of the flash RAM used by the rest of the microprocessor or (2) a separate flash RAM dedicated to the timer. It would be necessary to design the microprocessor hardware and software so that there would be no way to decrement the count or otherwise exert external control over the timer flash RAM.
This Brief includes a Technical Support Package (TSP).
Cumulative Timers for Microprocessors (reference NPO-43599) is currently available for download from the TSP library.
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