Fewer G4FETs than conventional transistors would be needed to implement logic functions.
A total of 81 optimal logic circuits based on four-gate field-effect transistors (G4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G4FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors.
Optimal NOT-majority-gate, G4FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. [NOT gates (inverters) were also included, as needed, in both the G4FET- and the NOR- and NAND-based designs.] In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer- programming optimization problem. The table summarizes results obtained in this study for the first four Boolean functions, showing that in most cases, fewer logic gates are needed in the NOT-majority (G4FET) implementation than in the NOR- and NAND-based conventional implementations. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63 percent of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G4FET-based implementations.
This work was done by Farrokh Vatan of Caltech for NASA’s Jet Propulsion Laboratory.
In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to:
Innovative Technology Assets Management
Mail Stop 202-233
4800 Oak Grove Drive
Pasadena, CA 91109-8099
Refer to NPO-44407, volume and number of this NASA Tech Briefs issue, and the page number.
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