Photonics Design Automation

Taking a Building Block Approach to Optical Chip Design

Fuelled by an increasing demand for bandwidth combined with a continued drive towards cost and size reduction, larger scale photonics integrated circuits are now clearly breaking through. For example, fiber optics networks are rapidly embracing 40Gbps and 100Gbps data rates, where the transmitters and receivers often include photonic integrated circuits. And the cost and size reduction in 10Gbps transceivers has driven several companies to successfully leverage photonic chips. The growing FTTH (fiber to the home) market is driving demand for integrated photonic splitters as well as monolithically integrated BiDi transceivers. And there are exciting applications in fiber sensing and bioscience that are now benefiting from optical chips as well.

Figure 1. Photonics Design Automation in Action. Chip photo is courtesy of TU/e COBRA and shows a high-speed PIC for use in FTTH applications.
At the same time, many photonics players have recognized that it is unaffordable to run their own fab and thus rely on foundries to manufacture these photonic integrated circuits. However the maturing field of integrated photonics needs better tools to streamline the design, packaging and fabrication of photonic chips. One approach is to borrow these tools from the integrated electronics industry that has successfully used foundries for a long time. By using design automation tools, photonic chip designs can become first-time-right. This, in turn, can lead to large cost savings through increased yields, by reducing the number of wafer iterations and by participating in Multi Project Wafer (MPW) runs.

Photonics Design Automation

In the electronics industry, the use of “Electronics Design Automation” (EDA) is widespread. A foundry offers an extensive set of building blocks (BBs), which a designer can use to create a complex device. These building blocks and their combination are guaranteed to work as expected if the given design rules are respected. Software supports each step in the design process, from physical analysis to layout and design rule checks before the final design is sent to the foundry. Advanced simulation tools can be directly linked to this EDA environment and greatly assist the designer in his work.

Figure 2. The integrated Product Creation Process (iPCP) forms the basis for Photonics Design Automation.
Within the context of several European programs, such as Paradigm, Helios and Memphis, a large number of European companies and institutions have worked together to set up a Photonics Design Automation (PDA) tool-set with this capability. Just like in EDA, photonic foundries define a number of building blocks in software tools ranging from physical and circuit simulators to mask layout.

Since the building blocks of one foundry are often very similar to those of other foundries, many designs can be easily ported from one foundry to another. Such a transfer can be done with hardly any changes to the chip performance, but with significant changes to the mask layout in order to accommodate different processes at the other foundry.

Integrated Product Creation Process

Figure 3a. Advanced Tunable Laser Design.
Underpinning the generic manufacturing concept is the fact that product design, process design, and high-yield manufacturing are intimately linked and cannot be separated. For this reason, the key information flow between the different stages of product and process development needs to be made available to all stakeholders through the use of software. When system engineers, design engineers, and process engineers work seamlessly together to design both the product as well as the required fabrication processes, this is known as the integrated Product Creation Process (iPCP) as shown in Figure 2.

This iPCP has been implemented in several European projects by developing foundry specific design kits. These kits allow users to benefit from mature technologies, while avoiding recurring costs by streamlining the discussions between the designers and the engineers at the foundry.


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