Part 2: OFF-State Characterization
Part 1 of this article, which appeared in the August 2013 issue of NASA Tech Briefs, dealt with ON-state characterization of high power semiconductors (link to Part 1). Part 2 concludes this discussion with an overview of OFF-state characterization.
The impact of the device on the overall circuit when the device is turned off must be investigated to understand overall product efficiency. For high-power devices, OFF-state characterization often requires a high-voltage instrument capable of sourcing hundreds or thousands of volts and measuring small currents. OFF-state characterization is often performed between two device terminals (regardless of the total number of device terminals), so a single SMU is often sufficient. However, an additional SMU can be used to force the device into its OFF state or add stress to certain terminals. Two primary DC tests are performed when the device is off: breakdown voltages and leakage currents.
A device’s OFF-state breakdown voltage determines the maximum voltage it can withstand. The primary withstand voltage of interest to power management product designers is the breakdown voltage between drain and source of a MOSFET, or between the collector and emitter of an IGBT or BJT. For a MOSFET, the gate can be either shorted or forced into a “hard” OFF state, such as by applying a negative voltage to an n-type device, or a positive voltage to a p-type device. This simple test can be performed using one or two SMUs. The lower-power SMU is connected to the gate and forces the transistor off. It can force 0V for a gate-shorted test or force a user-specified bias voltage. A high-voltage SMU forces current into the drain and measures the resulting drain voltage.
MOSFETs typically have breakdown voltages higher than their specified values. Therefore, it is useful to define the voltage limit of the drain SMU to a value higher than the specified breakdown voltage. Additionally, as the drain terminal is driven closer and closer toward avalanche, the behavior of the currents and voltages of the device under test (DUT) may begin to change.
Figure 1 is an example of transient characterization of the breakdown voltage between drain and source of a commercially available 600V silicon power MOSFET. A high-voltage SMU pulses a current into the MOSFET and then measures the voltage and current at 10μs intervals. The plot shows that the device actually breaks down at ~680V.
Another way of characterizing breakdown voltages involves forcing a voltage across the terminals of interest (e.g., drain and source of a MOSFET) and measuring the resulting current. The breakdown voltage is defined as the voltage at which the current exceeds a specified threshold; for example, 1mA. The maximum current must be limited to avoid destroying the device during testing. Unlike traditional curve tracers and power supplies, the newest SMUs include built-in programmable features to limit the maximum voltage and current to the DUT. As with any protection device, an SMU’s limit control has a finite response time. Some devices may have extremely fast and hard breakdown behavior in which the device impedance changes by several orders of magnitude in a very short period. When the device breaks down faster than the SMU can respond, series resistors can limit the total maximum current through the device.
Leakage current is the level of current that flows through two terminals of a device even when the device is off. It factors into the standby current of the end product, so minimizing leakage current minimizes power loss when the device is off. This power is consumed by the device and is not output to the load, and therefore contributes to power inefficiency. When using a transistor or diode to switch or rectify, it’s important to make a clear distinction between ON and OFF states; therefore, a lower leakage current means having a better switch.
In most cases, temperature and the voltage across the terminals of interest will affect leakage current. In fact, power semiconductor device reliability engineers often use leakage current to measure degradation of a device under accelerated life testing under temperature or voltage stress.
While testing a device’s OFF state, it’s generally desirable to test the gate leakage current and drain or collector leakage current. SMUs sensitive enough for nano-amp and micro-amp measurements are invaluable for testing power devices made of wide bandgap materials like silicon carbide, gallium nitride, and aluminum nitride, which typically have higher breakdown voltages and lower leakage currents than silicon devices. Figure 2 shows OFF-state drain voltage vs. drain current results for a commercially available SiC power MOSFET.
Low-Current Measurement Accuracy Considerations
Triaxial cables are essential to achieving accurate low-current measurements in part because they permit carrying the guard terminal. Guarding eliminates the effect of system leakage currents by routing them away from the measurement terminal. Additionally, guarding reduces settling time in high-voltage applications by virtually eliminating the need to charge the cable capacitance. Using a guarded test fixture or prober allows the benefits of guarding to be extended to the DUT.
Electrostatic shielding is another important consideration for low-current measurements. An electrostatic shield is a metal enclosure that surrounds the circuit and any exposed connections. The shield is connected to measurement common to shunt electrostatic charges away from the measurement node.
Finally, system validation is important for low-current characterization to ensure that the measurement is settled. Settling time increases as the expected current decreases. SMUs have auto delay settings that set reasonable delays to achieve good measurements while taking the instrument’s settling characteristics into account. However, to account for any unguarded system capacitance, perform a measurement validation by stepping voltage and measuring the resulting current through the system. Use the results from the validation to set additional source and measure delays in order to achieve consistent measurements.
Both device test and power module design engineers need comprehensive solutions for testing high power semiconductor discrete devices. To learn more about the characterization challenges associated with bringing new power semiconductor devices to market, download Keithley’s application note: Testing Power Semiconductor Devices with Keithley High Power System SourceMeter® SMU Instruments. For an example of how SMUs can be used for characterizing power modules at the system level, download the application note: Simplifying DC-DC Converter Characterization with a Series 2600B System SourceMeter® SMU Instrument and a MSO/DPO-5000 or DPO-7000 Series Scope.
This article was written by Jennifer Cheney, Staff Applications Engineer at Keithley Instruments (www.keithley.com) in Cleveland, OH, part of the Tektronix test and measurement portfolio.