Hardware Compression Platform
- Created on Sunday, 01 June 2008
4DSP, Reno, NV, has introduced a JPEG2000 hardware compression platform that is powered by Xilinx FPGA accelerators. The system provides image compression for digital cameras, 4G infrastructure, and headsets, and well as medical, military, and other precision imaging applications. JPEG2000 is a wavelet-based digital imaging compression standard, superseding the original discrete cosine transform-based JPEG compression method. The JPEG2000 PMC daughter card is based on two ADV22 devices and a SPARTAN-3AN FPGA.
The JPEG2000 CODEC platform can grab and compress up to 140 megapixels per second from two independent cameras. It can either encode the video frames prior to or after applying a video/imaging algorithm. Real-time pre-processing on raw data can be performed in the Virtex-4 or Virtex-5 FPGA devices. This can be used to correct effects such as local brightness or barrel distortion, to enhance image quality, and filter out elements that may reduce the compression effectiveness.
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