Thermal issues are dominating today’s electronic product design landscape as never before. It is easy to see this in Intel’s move to a multi-core architecture as a methodology to manage their thermal problems. Of course, less than optimal solutions lead to less than optimal results. Thermoelectric devices (TECs) have been used in the optoelectronics industry for thermal management, but have not found wide-spread acceptance in electronic product design. Thermal management solutions implemented with these active devices, however, offer a broad potential for implementation including the following:

Figure 1. Thermal and electrical bumps integrated on a single substrate.
General cooling: TECs can be evenly distributed across the surface of a chip to provide an evenly distributed cooling effect or they can be placed to locally cool a hot spot. In the former case, these devices are typically placed in the heat spreader or heat sink to provide cooling in the form of an active heat sink or heat spreader.

Figure 2. 3D thermal management.
Hotspot cooling: In microprocessors, graphics processors, and other high-end chips, hotspots can occur as power densities vary significantly across a chip. These hotspots can severely limit the performance of the devices. Today this problem has been placed on the back burner through the use of multi-core architecture but it is inevitable that in a few years it will come back.

Precision temperature control: Since thermoelectric devices can be used to either cool or heat the chip, depending on the direction of the current flow, they can be used to provide precision control of temperature for chips that must operate within specific temperature ranges irrespective of ambient conditions. This is a common problem for many opto-electronic components.

Power generation: In addition to chip cooling, thermally active devices can also be applied to high heat-flux interconnects to provide a constant, steady source of power for energy scavenging applications. Such a source of power, typically in the mW range, can trickle-charge batteries for wireless sensor networks and other battery-operated systems.

Integrating the Thermoelectric Function

Acceptance of discrete thermally active devices has not found the wide-spread acceptance in the electronic product world that it has in the opto-electronic product world. In large measure this is due to the dissimilar manufacturing processes used for the two types of products.

If a solution is to be found that brings active thermal management into the mainstream for electronic product design, it needs to be integrated directly into the existing packaging infrastructure. The integration of a thermally active material into a flip chip solder bump, or more specifically into a Copper Pillar Bump (CPB) to form a thermal bump, offers just such a solution.

The Thermal Copper Pillar Bump

The Thermal Copper Pillar Bump, also known as the thermal bump or TCPB, is a thermoelectric device made from thin-film thermoelectric material embedded in flip chip interconnects (in particular Copper Pillar Bumps) for use in electronics and optoelectronic packaging, including flip chip packaging of CPU and GPU integrated circuits (chips), laser diodes, and semi-conductor optical amplifiers (SOA). Unlike conventional solder bumps that provide an electrical path and a mechanical structure for connection to the package, thermal bumps act as solid-state heat pumps and add thermal management functionality on the surface of a chip or other electrical component. The diameter of a thermal bump is 238 μm (microns) and they are 60 μm high.

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