Home

Low-Power RIE of SiO<sub>2</sub> in CHF<sub>3</sub> To Obtain Steep Sidewalls

Process parameters are chosen carefully to minimize deleterious effects.

A reactive-ion etching (RIE) process has been developed to enable the formation of holes with steep sidewalls in a layer of silicon dioxide that covers a silicon substrate. The holes in question are through the thickness of the SiO2 and are used to define silicon substrate areas to be etched or to be built upon through epitaxial deposition of silicon. The sidewalls of these holes are required to be vertical in order to ensure that the sidewalls of the holes to be etched in the substrate or the sidewalls of the epitaxial deposits, respectively, also turn out to be vertical.

The pattern of holes in the SiO2 mask is established by use of a photoresist mask on top of the SiO2. The holes in the photoresist mask must also have vertical sidewalls. Prior techniques for etching the SiO2 areas exposed through the holes in the photoresist mask include wet chemical etching by use of HF and dry chemical etching by use of a gas mixture that gives rise to HF vapor during the etching process. The disadvantage of wet chemical etching is that it does not yield well controlled, vertical sidewalls. The disadvantage of dry chemical etching as described above is that the SiO2 is etched so quickly that one cannot ensure verticality of the sidewalls; in addition, the etching process causes the deposition of a carbonaceous polymeric residue that is thick enough to make it impossible to etch uniformly through the total thickness of the SiO2.

The essence of present RIE process is anisotropic etching of SiO2 in CHF3 with power kept low enough so as not to alter the shapes of the photoresist sidewalls and thereby to keep the SiO2 sidewalls close to vertical. Unlike the mixtures of gases used previously, CHF3 does not give rise to HF during this process. The recipe for this process is the following:

First Etch — CHF3 flowing at a rate between 10 and 15 standard cubic centimeters per minute; power between 30 and 50 W; and pressure between 0 and 20 mtorr (between 0 and 2.7 Pa). The etch rate lies between 6 and 9 nm/s.

Second Etch — Same parameters as those of the first etch. The etching time should be the time needed to complete the etch at the etch rate calculated from the result of the first etch.

By proceeding according to this recipe, one can minimize the buildup of the polymer and prevent both over-etching and undercutting. The angles between silicon substrates and sidewalls produced by this process range from 70° to 90°.

This work was done by Tasha Turner and Chi Wu of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Materials category.

In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to:
Intellectual Property group
JPL
Mail Stop 202-233
4800 Oak Grove Drive
Pasadena, CA 91109
(818) 354-2240

Refer to NPO-20776, volume and number of this NASA Tech Briefs issue, and the page number.

This Brief includes a Technical Support Package (TSP).

Low-Power RIE of SIO2 in CHF3 To Obtain Steep Sidewalls (reference NPO-20776) is currently available for download from the TSP library.

Please Login at the top of the page to download.