Electrophoretic Deposition for Fabricating Microbatteries
- Monday, 22 January 2007
Discharge capacities can be much greater than those achieved previously.
An improved method of fabrication of cathodes of microbatteries is based on electrophoretic deposition. Heretofore, sputtering (for deposition) and the use of photoresist and liftoff (for patterning) have been the primary methods of fabricating components of microbatteries. The volume of active electrode material that can be deposited by sputtering is limited, and the discharge capacities of prior microbatteries have been limited accordingly. In addition, sputter deposition is slow. In contrast, electrophoretic deposition is much faster and has shown promise for increasing discharge capacities by a factor of 10, relative to those of microbatteries fabricated by prior methods.
Microbatteries of the type to which the improved method applies are fabricated on silicon wafers, with cell footprints of the order of (50 to 100 μm)2. In the improved method, cathodes are formed directly on cathode current-collector pads; there is no need for additional lithography or etching to define the cathodes. In order to make it possible for cathode material to be deposited onto current-collector pads, it is necessary to ensure that the pads are electrically connected to ground during the electrophoretic deposition process. This can be done in any of several different ways. For example, current collectors can be deposited by sputtering and patterned such that a metal line connects all current collectors. After electrophoretic deposition of cathode material, the connecting lines can be removed by simple patterning and etching to yield unconnected microbattery cells.
2 and ancillary cathode constituents were deposited into microscopic holes etched into a silicon substrate. This is a cross-sectional view of one of the holes."/>Alternatively, in a simpler approach that has been followed in practical development thus far, an electrically conductive silicon substrate can be used as a ground plane. First, a silicon wafer is coated with an insulating layer of silicon dioxide or silicon nitride to a thickness of about 3 to 5 µm. The substrate is patterned with photoresist and subjected to reactive-ion etching to open vias to the silicon substrate. These vias serve the cathode current collectors for the microbattery. The exposed silicon can then be further etched to produce deep pockets into which cathode material can be deposited to increase the effective volume of cathode material (see figure).
A suspension of powdered cathode material (e.g., LiCoO2), acetone, iodine, and an electrically conductive additive is prepared. The iodine serves to facilitate the formation of positively charged complexes of the particles to be deposited so that they can be moved through the applied electric field during deposition. The conductive additive could be, for example, tin powder or carbon black.
The substrate is positioned about 1 cm from a counter electrode. The substrate/counter-electrode assembly is immersed in the suspension, and then a potential of about 70 V is applied between the substrate and the counter electrode (the counter electrode being positive with respect to the substrate) for a time of about 90 seconds. The particles of cathode material, being positively charged, are transported through the suspension to the silicon substrate, where they become deposited only on electrically conductive surfaces. The substrates are then coated with a solid-electrolyte film and patterned with anode current collectors by use of previously published techniques.
This work was done by William West, Jay Whitacre, and Ratnakumar Bugga of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.nasatech.com/tsp under the Manufacturing category.
n accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to
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Refer to NPO-30394, volume and number of this NASA Tech Briefs issue, and the page number.
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