Test is critical to the board manufacturing process. Effective test ensures quality and customer satisfaction both for the OEM (original equipment manufacturer) and the CEM (contract electronics manufacturer). By isolating defects before product shipment, test minimizes returns and related costs. But test takes time, and the cost can be prohibitive.
In today's outsourced global manufacturing environment, collaboration among board design, layout, and test group —who must work together both to specify test coverage metrics and to define and check any design modifications that are required to achieve testability — is challenging. Testing today's dense boards requires the CEM or test house to develop complex complementary test strategies using a variety of machines. After a test strategy has been developed, test programs have to be generated and debugged for different equipment.
A number of tools exist to streamline the execution of these tasks. But in many cases, tools like point systems aren't helpful because complementary test strategies typically use testers from more than one vendor, and many of the upstream process steps for test (e.g., for recovery of CAD design and bill of materials data) also are required for assembly. In-house systems that are intended to eliminate duplication are extremely costly to develop and expensive to maintain, even for a large CEM.
In order to collaborate effectively, cross-functional design and test groups jointly responsible for test strategy development need to be able to view design data and added manufacturing data anywhere. One must be able to automatically recover all the board design data (including PCB layout, bill of materials, and circuit schematics) needed to drive manufacturing and test processes all the way from assembly-line balancing and test strategy definition, through generation of machine programs and factory floor documentation.
The test solution should be able to display the PCB layout graphically, just as the layout designer sees it on a PCB CAD system, together with multi-page circuit schematics. It should also display test data such as probe locations, assignments of components to different test systems, input lists, and documentation. Moreover, if a board design is revised to address a testability issue, the differences between the current and previous revisions should be easily evident, making it easier to verify that old problems have been solved and that new ones have not been introduced. Given visible design and manufacturing data, a test strategy can be built based on coverage, speed, and cost requirements.
Developing a test strategy for testing the components on a board today is a much more demanding task than it was in the days when close to 100 percent test coverage could be achieved with an in-circuit bed-of-nails tester. Increasingly complex and dense boards often have nets that are physically inaccessible for probing. A complementary test strategy needs to balance tests between different test systems that detect overlapping but nonetheless different failure ranges, minimizing duplicate tests for the same potential defect, while at the same time meeting test coverage and quality goals.