A main goal is to reduce labor and errors in the design process.

A methodology and software to implement the methodology are under development in an effort to automate at least part of the process of designing integrated-circuit (IC) chips that perform complex data-processing fun- ctions. An important element of the methodology is reuse of prior designs, with modifications as required to optimize for a specific application. This minimizes a labor-intensive, errorprone part of the design process. The prior designs include what are known in the art as intellectual-property (IP) cores — that is, designs of functional blocks [e.g., random-access memories (RAMs), communications circuits, processors] that are incorporated into larger designs. Circuits may be optimized with respect to design goals, such as reducing chip size, reducing power consumption, and/or increasing radiation hardness.