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Using FPGAs for Automated Design Validation
Monday, November 01 2010
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In the design process, after the first prototype returns from fabrication, engineers often use traditional test equipment to make low-level measurements such as digital rise times, voltage thresholds, and leakage currents, and analog harmonic and spurious distortion, noise, and more. Once these parameters are verified to be within specification, higher-level attributes such as protocol compliance on digital devices and modulation parameters on communications devices are then checked. This gives the engineer a good understanding of how the device behaves, and whether or not that behavior allows the device to properly interact with the world around it. However, how can you guarantee that the device will continue to operate over time, with the myriad of permutations of device state, data content, and in the presence of non-ideal, real-world conditions? Who has the time to run all those tests?
Figure 1. NI LabVIEW FPGA code for a continuous bit error rate tester, showing the simplicity of a high-performance application.
Enter FPGAs. Field-programmable gate arrays (FPGAs) have long been used to implement hardware-defined functionality in prototype and low volume systems due to their versatility, reconfigurable nature, and cost advantages over custom silicon. But as development tools continue to evolve, FPGA technology is becoming more accessible to a broader variety of users. One new application area for FPGAs is in automated test because FPGAs bring a number of advantages to test systems, namely algorithm parallelism, higher performance processing, and ultra-low latency decision making. FPGAs can add value to the design process by running extended high-level or real-world tests, interfacing with the design-under-test in a deterministic manner, with the processing capabilities to sufficiently model the outside world in real time. Take, for instance, a high-speed digital bus. Any communications channel has some non-zero probability of inducing errors, and it is important to know if the theoretical performance calculated during design holds true in the real world. Performing such a measurement using traditional methods would be prohibitively slow, however, due to the vector-based nature of most digital test equipment. As significant time would be spent creating test vectors, transferring data to and from instrumentation, and comparing stimulus and response data, the fraction of time spent actually transmitting or receiving data over the bus would be quite low. If all this functionality is instead moved onto an FPGA and the pattern generation and comparison calculations are performed in real time, the duty cycle of the test reaches 100 percent. Furthermore, this can be completely automated and requires no human intervention. In this manner, bus tests of hours or even days can be run to gain greater confidence in the design.
One example of FPGA-based test hardware is NI FlexRIO, a modular instrument for PXI which enables users to buy or build test or application-specific I/O and interface to NIST-traceable instrumentation through the high-bandwidth PCI Express / PXI Express backplane. Using the NI LabVIEW FPGA module, you can program the NI FlexRIO FPGA with a high-level software tool, configuring the FPGA graphically rather than through text-based HDL languages.
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