Home

Radiation Hard By Design (RHBD) Electronics

Under certain conditions, a false signal will be absorbed and a correct signal will be generated. Goddard Space Flight Center, Greenbelt, Maryland Current RHBD electronics are limited to speeds that approximate 250 MHz, regardless of the electronic process. The fact that determines the final speed is based on the nature of the current SEU (single-event upsets) radiation-tolerant latches, and the data flow between the latches through combinational logic.

Posted in: Semiconductors & ICs, Briefs

Read More >>

Detecting Loss of Configuration Access of Reprogrammable FPGA Without External Circuitry

This innovation makes use of the clearing of distributed memory that results from configuration refreshes. Langley Research Center, Hampton, Virginia The configuration of the reprogrammable field-programmable gate array (FPGA) currently on the market is very susceptible to single event upset when it operates in radiation environments. The current state-of-the-art approach is to refresh the configuration while the FPGA is operating. When using this approach, it is essential to detect the loss of configuration access while the FPGA is operating in a radiation environment, allowing the system to initiate a configuration access recovery.

Posted in: Semiconductors & ICs, Briefs

Read More >>

Micro-Coil Spring Interconnection for Ceramic Grid Array Packaged Integrated Circuits

This interconnection method extends the useful life of ceramic area array integrated circuits. Marshall Space Flight Center, Alabama This method of interconnecting ceramic integrated circuits to organic printed circuit boards (PCBs) is designed to substantially increase the life of the interconnections. This is accomplished by providing a means of compensating for the shear stresses produced by thermal excursions as a result of the large mismatch of coefficients of thermal expansion between the integrated circuit and the printed circuit board.

Posted in: Semiconductors & ICs, Briefs

Read More >>

Method for Formal Verification of Polymorphic Heterogeneous Multicore Processors

John H. Glenn Research Center, Cleveland, Ohio Amethod was developed to model polymorphic heterogeneous multicore processors at a high level of abstraction, and formally verify them. The Bahurupi polymorphic heterogeneous multi-core architecture allows the combination of multiple simple processor cores — which can be superscalar — in order to form a coalition that behaves like a wider superscalar processor. This is done at runtime under software directives, allowing the architecture to adapt to the needs of executed applications with high instruction level parallelism. Such coalitions of cores were found to have comparable or better performance than that of a wide superscalar processor with issue width equal to the sum of the issue widths of the simple cores in the coalition, while avoiding the complexity, reliability issues, and high power consumption of wide superscalar cores. All of these are highly desirable advantages of future microprocessors that will be optimized for aerospace applications.

Posted in: Semiconductors & ICs, Briefs

Read More >>

SEE Mitigation Technique for Self-Timed Circuits and Rad-Hard, Self-Timed Configurable Memory

The new block RAM is faster and consumes less power than conventional block RAMs, while providing unparalleled levels of radiation resilience. Marshall Space Flight Center, Alabama To enable NASA’s next-generation missions, there is a critical need for a reconfigurable field programmable gate array (FPGA) that can withstand the wide temperature ranges and radiation of the space environment while consuming minimal power without compromising on performance. To address this need, GoofyFoot Labs developed the E2-AMP FPGA, a radiation-hardened, high-performance, low-power FPGA capable of operating reliably over wide temperature ranges and rapid thermal changes.

Posted in: Semiconductors & ICs, Briefs

Read More >>

Modeling for Partitioned and Multicore Flight Software Systems

NASA’s Jet Propulsion Laboratory, Pasadena, California The current flight software approach is monolithic in nature. Every module has tentacles that reach deep within dozens of other software modules. Because of these interdependencies between modules, functionality is difficult to extract and reuse for other missions.

Posted in: Semiconductors & ICs, Briefs

Read More >>

Process for Coating Substrates With Catalytic Materials

This process can remove volatile organic compounds from indoor air in planes, automobiles, homes, and industrial plants. Langley Research Center, Hampton, Virginia This invention relates to the process of coating substrates with one or more components to form a catalyst; specifically, the process of layering one or more catalytic components onto a honeycomb monolith to form a carbon monoxide oxidation that combines CO and O2 to form CO2, or alternatively, a volatile organic compound oxidation catalyst that combines the compound and O2 to form CO2 and H2O.

Posted in: Manufacturing & Prototyping, Briefs

Read More >>