Semiconductors & ICs

Making Wide-IF SIS Mixers With Suspended Metal-Beam Leads

Devices are fabricated on SOI substrates by use of silicon-micromachining techniques. A process that employs silicon-on-insulator (SOI) substrates and silicon (Si) micromachining has been devised for fabricating wide intermediate frequency band (wide-IF) superconductor/ insulator/ superconductor (SIS) mixer devices that result in suspended gold beam leads used for radio-frequency grounding. The mixers are formed on 25-µm-thick silicon membranes. They are designed to operate in the 200 to 300 GHz frequency band, wherein wide-IF receivers for tropospheric- chemistry and astrophysical investigations are necessary. The fabrication process can be divided into three sections:

Posted in: Semiconductors & ICs, Briefs, TSP

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Making AlNx Tunnel Barriers Using a Low-Energy Nitrogen-Ion Beam

Ion-beam parameters can be controlled to optimize properties of AlNx layers. A technique based on accelerating positive nitrogen ions onto an aluminum layer has been demonstrated to be effective in forming thin (<2 nm thick) layers of aluminum nitride (AlNx) for use as tunnel barriers in Nb/Al-AlNx/Nb superconductor/ insulator/ superconductor (SIS) Josephson junctions. AlNx is the present material of choice for tunnel barriers because, to a degree greater than that of any other suitable material, it offers the required combination of low leakage current at high current density and greater thermal stability.

Posted in: Semiconductors & ICs, Briefs

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Stripline/Microstrip Transition in Multilayer Circuit Board

Transitions like this one could be useful in microwave communication products. A stripline to microstrip transition has been incorporated into a multilayer circuit board that supports a distributed solid-state microwave power amplifier, for the purpose of coupling the microwave signal from a buried-layer stripline to a top-layer microstrip. The design of the transition could be adapted to multilayer circuit boards in such products as cellular telephones (for connecting between circuit-board signal lines and antennas), transmitters for Earth/satellite communication systems, and computer mother boards (if processor speeds increase into the range of tens of gigahertz).

Posted in: Semiconductors & ICs, Briefs, TSP

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Mathematical Modeling of a Copper-Deposition System for Integrated Circuits

A unique process for making flip-chip IC receptacles required optimization through modeling. Advanced packaging techniques are the key to utilizing state-of-the-art microelectronic devices. The flip-chip method has become a cost-effective means of erasing many packaging and thermal issues that could spell disaster for high-density, high-power integrated circuits (ICs). Making flip-chip receptacles presents significant engineering challenges. To overcome those challenges, Replisaurus developed a unique process that required mathematical modeling to better understand and optimize the patented process.

Posted in: Semiconductors & ICs, Briefs

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Multifunctional Logic Gate Controlled by Temperature

This circuit performs different logic functions at different temperatures. The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that has been designed to function as a NAND gate at a temperature between 0 and 80 °C and as a NOR gate at temperatures from 120 to 200 °C. In the intermediate temperature range of 80 to 120 °C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics — a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.

Posted in: Semiconductors & ICs, Briefs, TSP

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Multifunctional Logic Gate Controlled by Supply Voltage

This circuit performs different logic functions at different levels of supply voltage. The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that functions as a NAND gate at a power-supply potential (Vdd) of 3.3 V and as NOR gate for Vdd = 1.8 V. In the intermediate Vdd range of 1.8 to 3.3 V, this circuit performs a function intermediate between NAND and NOR with degraded noise margin. Like the circuit of the immediately preceding article, this circuit serves as a demonstration of the evolutionary approach to design of polymorphic electronics — a technological discipline that emphasizes evolution of the design of a circuit to perform different analog and/or digital functions under different conditions. In this instance, the different conditions are different values of Vdd.

Posted in: Semiconductors & ICs, Briefs, TSP

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FETs Based on Doped Polyaniline/Polyethylene Oxide Fibers

Advantages include tailorability of electronic properties and low power demands. A family of experimental highly miniaturized field-effect transistors (FETs) is based on exploitation of the electrical properties of nanofibers of polyaniline/ polyethylene oxide (PANi/PEO) doped with camphorsulfonic acid. These polymer-based FETs have the potential for becoming building blocks of relatively inexpensive, low-voltage, high-speed logic circuits that could supplant complementary metal oxide/semiconductor (CMOS) logic circuits.

Posted in: Semiconductors & ICs, Briefs, TSP

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