Semiconductors & ICs

SAD5 Stereo Correlation Line-Striping in an FPGA

High precision SAD5 stereo computations can be performed in an FPGA (field-programmable gate array) at much higher speeds than possible in a conventional CPU (central processing unit), but this uses large amounts of FPGA resources that scale with image size. Of the two key resources in an FPGA, Slices and BRAM (block RAM), Slices scale linearly in the new algorithm with image size, and BRAM scales quadratically with image size. An approach was developed to trade latency for BRAM by sub-windowing the image vertically into overlapping strips and stitching the outputs together to create a single continuous disparity output.

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Miniature Sapphire Acoustic Resonator — MSAR

Q values as high as 108 may be achieved at room temperature.A room temperature sapphire acoustics resonator incorporated into an oscillator represents a possible opportunity to improve on quartz ultrastable oscillator (USO) performance, which has been a staple for NASA missions since the inception of spaceflight. Where quartz technology is very mature and shows a performance improvement of perhaps 1 dB/decade, these sapphire acoustic resonators when integrated with matured quartz electronics could achieve a frequency stability improvement of 10 dB or more. As quartz oscillators are an essential element of nearly all types of frequency standards and reference systems, the success of MSAR would advance the development of frequency standards and systems for both ground-based and flight-based projects.

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Process-Hardened, Multi-Analyte Sensor for Characterizing Rocket Plume Constituents

A multi-analyte sensor was developed that enables simultaneous detection of rocket engine combustion-product molecules in a launch-vehicle ground test stand. The sensor was developed using a pin-printing method by incorporating multiple sensor elements on a single chip. It demonstrated accurate and sensitive detection of analytes such as carbon dioxide, carbon monoxide, kerosene, isopropanol, and ethylene from a single measurement.

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Radiation-Hardened Solid-State Drive

A method is provided for a radiationhardened (rad-hard) solid-state drive for space mission memory applications by combining rad-hard and commercial offthe- shelf (COTS) non-volatile memories (NVMs) into a hybrid architecture. The architecture is controlled by a rad-hard ASIC (application specific integrated circuit) or a FPGA (field programmable gate array). Specific error handling and data management protocols are developed for use in a rad-hard environment. The rad-hard memories are smaller in overall memory density, but are used to control and manage radiation-induced errors in the main, and much larger density, non-rad-hard COTS memory devices.

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Quad-Chip Double-Balanced Frequency Tripler

This technology has uses such as high-resolution radar and spectroscopic screening.Solid-state frequency multipliers are used to produce tunable broadband sources at millimeter and submillimeter wavelengths. The maximum power produced by a single chip is limited by the electrical breakdown of the semiconductor and by the thermal management properties of the chip. The solution is to split the drive power to a frequency tripler using waveguides to divide the power among four chips, then recombine the output power from the four chips back into a single waveguide.

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Ka-Band Waveguide Two-Way Hybrid Combiner for MMIC Amplifiers

This technology is applicable as a power combiner for solid-state power amplifiers (SSPAs) with unequal and arbitrary power output ratios.The design, simulation, and characterization of a novel Ka-band (32.05±0.25 GHz) rectangular waveguide two-way branch-line hybrid unequal power combiner (with port impedances matched to that of a standard WR-28 waveguide) has been created to combine input signals, which are in phase and with an amplitude ratio of two. The measured return loss and isolation of the branch-line hybrid are better than 22 and 27 dB, respectively. The measured combining efficiency is 92.9 percent at the center frequency of 32.05 GHz. This circuit is efficacious in combining the unequal output power from two Ka-band GaAs pseudomorphic high electron mobility transistor (pHEMT) monolithic microwave integrated circuit (MMIC) power amplifiers (PAs) with high efficiency.

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Compact, Reliable EEPROM Controller

This controller prevents inadvertent writes in an EEPROM. A compact, reliable controller for an electrically erasable, programmable readonly memory (EEPROM) has been developed specifically for a space-flight application. The design may be adaptable to other applications in which there are requirements for reliability in general and, in particular, for prevention of inadvertent writing of data in EEPROM cells.

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