Semiconductors & ICs

Monitoring Digital Closed-Loop Feedback Systems

Designed-in test circuitry enables determination of performance margins and performance trends.A technique of monitoring digital closed-loop feedback systems has been conceived. The basic idea is to obtain information on the performances of closed-loop feedback circuits in such systems to aid in the determination of the functionality and integrity of the circuits and of performance margins.

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Interface Supports Multiple Broadcast Transceivers for Flight Applications

A wireless avionics interface provides a mechanism for managing multiple broadcast transceivers. This interface isolates the control logic required to support multiple transceivers so that the flight application does not have to manage wireless transceivers. All of the logic to select transceivers, detect transmitter and receiver faults, and take autonomous recovery action is contained in the interface, which is not restricted to using wireless transceivers. Wired, wireless, and mixed transceiver technologies are supported.

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FPGA Sequencer for Radar Altimeter Applications

A sequencer for a radar altimeter provides accurate attitude information for a reliable soft landing of the Mars Science Laboratory (MSL). This is a field-programmable-gate-array (FPGA)-only implementation. A table loaded externally into the FPGA controls timing, processing, and decision structures. Radar is memory-less and does not use previous acquisitions to assist in the current acquisition. All cycles complete in exactly 50 milliseconds, regardless of range or whether a target was found.

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SAD5 Stereo Correlation Line-Striping in an FPGA

High precision SAD5 stereo computations can be performed in an FPGA (field-programmable gate array) at much higher speeds than possible in a conventional CPU (central processing unit), but this uses large amounts of FPGA resources that scale with image size. Of the two key resources in an FPGA, Slices and BRAM (block RAM), Slices scale linearly in the new algorithm with image size, and BRAM scales quadratically with image size. An approach was developed to trade latency for BRAM by sub-windowing the image vertically into overlapping strips and stitching the outputs together to create a single continuous disparity output.

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Miniature Sapphire Acoustic Resonator — MSAR

Q values as high as 108 may be achieved at room temperature.A room temperature sapphire acoustics resonator incorporated into an oscillator represents a possible opportunity to improve on quartz ultrastable oscillator (USO) performance, which has been a staple for NASA missions since the inception of spaceflight. Where quartz technology is very mature and shows a performance improvement of perhaps 1 dB/decade, these sapphire acoustic resonators when integrated with matured quartz electronics could achieve a frequency stability improvement of 10 dB or more. As quartz oscillators are an essential element of nearly all types of frequency standards and reference systems, the success of MSAR would advance the development of frequency standards and systems for both ground-based and flight-based projects.

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Process-Hardened, Multi-Analyte Sensor for Characterizing Rocket Plume Constituents

A multi-analyte sensor was developed that enables simultaneous detection of rocket engine combustion-product molecules in a launch-vehicle ground test stand. The sensor was developed using a pin-printing method by incorporating multiple sensor elements on a single chip. It demonstrated accurate and sensitive detection of analytes such as carbon dioxide, carbon monoxide, kerosene, isopropanol, and ethylene from a single measurement.

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Compact, Reliable EEPROM Controller

This controller prevents inadvertent writes in an EEPROM. A compact, reliable controller for an electrically erasable, programmable readonly memory (EEPROM) has been developed specifically for a space-flight application. The design may be adaptable to other applications in which there are requirements for reliability in general and, in particular, for prevention of inadvertent writing of data in EEPROM cells.

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