Semiconductors & ICs

LC Circuits for Diagnosing Embedded Piezoelectric Devices

Failures are readily identified through changes in resonance frequencies. A recently invented method of nonintrusively detecting faults in piezoelectric devices involves measurement of the resonance frequencies of inductor-capacitor (LC) resonant circuits. The method is intended especially to enable diagnosis of piezoelectric sensors, actuators, and sensor/actuators that are embedded in structures and/or are components of multilayer composite-material structures.

Posted in: Semiconductors & ICs, Briefs

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Improved Method of Manufacturing SiC Devices

Several improvements promise to make manufacture of SiC devices more economical. The phrase, “common-layered architecture for semiconductor silicon carbide” (“CLASSiC”) denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres).

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Alumina or Semiconductor Ribbon Waveguides at 30 to 1,000 GHz

The waveguides would be configured to exploit low-loss electromagnetic modes. Ribbon waveguides made of alumina or of semiconductors (Si, InP, or GaAs) have been proposed as low-loss transmission lines for coupling electronic components and circuits that operate at frequencies from 30 to 1,000 GHz. In addition to low losses (and a concomitant ability to withstand power levels higher than would otherwise be possible), the proposed ribbon waveguides would offer the advantage of compatibility with the materials and structures now commonly incorporated into integrated circuits.

Posted in: Semiconductors & ICs, Briefs, TSP

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Single-Chip FPGA Azimuth Pre-Filter for SAR

Range resolution is reduced by a selectable factor to reduce the volume of data. A field-programmable gate array (FPGA) on a single lightweight, low power integrated-circuit chip has been developed to implement an azimuth pre-filter (AzPF) for a synthetic-aperture radar (SAR) system. The AzPF is needed to enable more efficient use of data-transmission and data-processing resources: In broad terms, the AzPF reduces the volume of SAR data by effectively reducing the azimuth resolution, without loss of range resolution, during times when end users are willing to accept lower azimuth resolution as the price of rapid access to SAR imagery. The data-reduction factor is selectable at a decimation factor, M, of 2, 4, 8, 16, or 32 so that users can trade resolution against processing and transmission delays.

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HEMT Frequency Doubler With Output at 300 GHz

This is the highest-frequency HEMT doubler reported to date. An active frequency doubler in the form of an InP-based monolithic microwave integrated circuit (MMIC) containing a high electron mobility transistor (HEMT) has been demonstrated in operation at output frequencies in the vicinity of 300 GHz. This is the highest frequency HEMT doubler reported to date, the next highest frequency active HEMT doubler having been previously reported to operate at 180 GHz. While the output power of this frequency doubler is less than that of a typical Schottky diode, this frequency doubler is considered an intermediate product of a continuing effort to realize the potential of active HEMT frequency doublers to operate with conversion efficiencies greater than those of passive diode frequency doublers. An additional incentive for developing active HEMT frequency doublers lies in the fact that they can be integrated with amplifiers, oscillators, and other circuitry on MMIC chips.

Posted in: Semiconductors & ICs, Briefs, TSP

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Apparatus for Precise Indium-Bump Bonding of Microchips

Bonding force is distributed more nearly evenly and controlled more precisely. An improved apparatus has been designed and built for use in precise positioning and pressing of a microchip onto a substrate (which could, optionally, be another microchip) for the purpose of indium-bump bonding. The apparatus (see figure) includes the following:  

Posted in: Semiconductors & ICs, Briefs, TSP

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Multiple Embedded Processors for Fault-Tolerant Computing

Outputs of processors would be compared to detect and correct bit errors.A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors.

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