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Lightweight Internal Device to Measure Tension in Hollow- Braided Cordage
System, Apparatus, and Method for Pedal Control
Dust Tolerant Connectors
Foldable and Deployable Power Collection System
Iodine-Compatible Hall Effect Thruster
Development of a Novel Electrospinning System with Automated Positioning and Control Software
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Orchestrator Telemetry Processing Pipeline

A multi-platform architecture is used to build and manage a telemetry-processing pipeline. Orchestrator is a software application infrastructure for telemetry monitoring, logging, processing, and distribution. The architecture has been applied to support operations of a variety of planetary rovers. Built in Java with the Eclipse Rich Client Platform, Orchestrator can run on most commonly used operating systems. The pipeline supports configurable parallel processing that can significantly reduce the time needed to process a large volume of data products.

Posted in: Briefs, Information Sciences

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Scheme for Quantum Computing Immune to Decoherence

The spintronic encodings of this scheme are more efficient than those of a prior scheme. A constructive scheme has been devised to enable mapping of any quantum computation into a spintronic circuit in which the computation is encoded in a basis that is, in principle, immune to quantum decoherence. The scheme is implemented by an algorithm that utilizes multiple physical spins to encode each logical bit in such a way that collective errors affecting all the physical spins do not disturb the logical bit. The scheme is expected to be of use to experimenters working on spintronic implementations of quantum logic.

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Ring Bus Architecture for a Solid-State Recorder

A document concisely describes a ring bus architecture for a proposed solid-state recorder (SSR) that would serve as buffer of data to be transmitted from a spacecraft to Earth. This architecture would afford fault tolerance needed for reliable operation in an anticipated high-radiation environment in which traditional SSRs cannot operate reliably. Features of the architecture include one or more controller boards and multiple memory boards interconnected in a ringlike topology. The interconnections would be high-speed serial links complying with the Institute of Electrical and Electronics Engineers (IEEE) standard 1393 (which pertains to a spaceborne fiber-optic data bus).

Posted in: Briefs, TSP, Information Sciences

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Image Compression Algorithm Altered To Improve Stereo Ranging

A report discusses a modification of the ICER image-data-compression algorithm to increase the accuracy of ranging computations performed on compressed stereoscopic image pairs captured by cameras aboard the Mars Exploration Rovers. (ICER and variants thereof were discussed in several prior NASA Tech Briefs articles.) Like many image compressors, ICER was designed to minimize a mean-square-error measure of distortion in reconstructed images as a function of the compressed data volume. The present modification of ICER was preceded by formulation of an alternative error measure, an image-quality metric that focuses on stereoscopic-ranging quality and takes account of image-processing steps in the stereoscopic-ranging process. This metric was used in empirical evaluation of bit planes of wavelet-transform subbands that are generated in ICER.

Posted in: Briefs, TSP, Information Sciences

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Fault-Tolerant Coding for State Machines

State machines can be rendered immune to single-event upsets. Two reliable fault-tolerant coding schemes have been proposed for state machines that are used in field-programmable gate arrays and application-specific integrated circuits to implement sequential logic functions. The schemes apply to strings of bits in state registers, which are typically implemented in practice as assemblies of flip-flop circuits. If a single-event upset (SEU, a radiation- induced change in the bit in one flip-flop) occurs in a state register, the state machine that contains the register could go into an erroneous state or could “hang,” by which is meant that the machine could remain in undefined states indefinitely. The proposed fault-tolerant coding schemes are intended to prevent the state machine from going into an erroneous or hang state when an SEU occurs.

Posted in: Briefs, TSP, Information Sciences

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Algorithm Optimally Orders Forward-Chaining Inference Rules

Requirements for exhaustive data-flow analysis are relaxed. People typically develop knowledge bases in a somewhat ad hoc manner by incrementally adding rules with no specific organization. This often results in a very inefficient execution of those rules since they are so often order sensitive. This is relevant to tasks like Deep Space Network in that it allows the knowledge base to be incrementally developed and have it automatically ordered for efficiency.

Posted in: Briefs, TSP, Information Sciences

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Project Integration Architecture

All information of technological processes can be readily originated, manipulated, shared, propagated to other processes, and viewed by man or machine. The Project Integration Architecture (PIA) is a distributed, object- oriented, conceptual, software framework for the generation, organization, publication, integration, and consumption of all information involved in any complex technological process in a manner that is intelligible to both computers and humans. As used here, “all information” signifies, more specifically, all information that has been or could be coded in digital form. This includes not only experimental data, design data, results of simulations and analyses, organizational and financial data, and the like, but also sets of rules, computer programs, processes, and methods of solution.

Posted in: Briefs, TSP, Information Sciences

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