IP Core Software for FPGA Chips

SERCOS International (Santa Rosa Beach, FL) has introduced Easy-I/O, a freely downloadable IP core software for low-cost FPGA chips that allows SERCOS III to be integrated into basic I/O slave devices with minimal development and integration effort. To minimize the costs for a slave interface, the functionality of a SERCOS III slave was reduced to a minimum. Thus, the Easy-I/O IP core supports only the SERCOS III realtime and service channels.

Up to 64-byte master real-time data and 64-byte slave real-time data can be processed. Ethernet frames that are transmitted within the Non-Real-Time (NRT) channel of a SERCOS III network are directly forwarded to the next network node. The asynchronous service channel is realized inside the IP Core and allows read and write access to the available parameter according to the standardized SERCOS III I/O profile. Typical target applications of Easy-I/O are encoders, measuring sensors, valve clusters, 24V digital I/O, and analog I/O. A free version of the core is provided for the Xilinx Spartan-3 XC3S250E device in a TQ144 housing. It supports 16 digital inputs and 16 digital outputs.