As computer processor chips grow faster and more complex, they are likely to make it to market with more design bugs. But that may be OK, according to University of Michigan researchers who have devised a new system that lets chips work around all functional bugs, even those that haven't been detected. Normally CPU manufacturers find functional bugs by simulating different scenarios,

commands and configurations that their processor might encounter. The problem is, bugs only show themselves when they're triggered by certain configurations. When firms find major bugs, they fix them, but because it would be virtually impossible to simulate all possibilities, engineers don't find all of the bugs.

Buggy hardware inadvertently released to customers could fail. Short of replacing the product, there isn't much a company can do these days to fix the problem. The University of Michigan researchers' system would eliminate this risk by building a virtual fence that prevents a chip from operating in untested configurations. The approach keeps track of all the configurations the firm did test, and loads that information onto a miniscule monitor that would be added to each processor. The monitor, called a semantic guardian, keeps the chip operating within its virtual fence. When the chip encounters a configuration that has not been validated, the monitor would switch it into a slower, bare-bones, safe mode. In this way, the monitor would treat all untested configurations as potential threats.

In case you're worried about performance, researchers say the guardian isn't as controlling as it may sound. "If you consider all the possible configurations of the processor, only a tiny fraction of them is verified," said Valeria Bertacco, assistant professor in the Department of Electrical Engineering and Computer Science. "But that tiny portion accounts for the configurations that occur 99.9 percent of the time."

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