NASA Glenn has developed a method to correct for variations in transistor threshold voltage due to die location on the wafer for silicon carbide (SiC) op amps, enabling improved electrical circuits for sensor signal conditioning in harsh environments. Important system-level benefits are enabled by improved performance data from sensor circuitry mounted within very hot gas turbine flows or the primary coolant loop of a nuclear reactor, for example.
Often, tiny (microvolt) signals from sensors require conditioning by high-temperature electrical components to filter, amplify, and convert to levels suitable for digitization and “smart” system control. Op amps are a critical component for signal amplification. With the threshold voltage correction scheme, the signal amplification of all op amps, at any position on the SiC wafer, is the same, extending reliable signal conditioning well beyond the current temperature limits of conventional silicon integrated circuits, allowing useful chips to be produced across the entire SiC wafer surface.
For robust operational amplifiers based on SiC Junction Field Effect Transistors (JFETs), this compensation method mitigates issues with threshold voltage variations that are an effect of die location on the wafer. Modern high-temperature op amps on the market fall short due to temperature limits (only 225 °C for silicon-based devices).
Previously, researchers noted that multiple op amps on a single SiC wafer had different amplification properties due to different threshold voltages that varied spatially as much as 18%, depending on the circuit’s distance from the SiC wafer center. While 18% is acceptable for some applications, other important system applications demand better precision. By applying this technology to the amplifier circuit design process, the op amp will provide the same signal gain no matter its position on the wafer. The compensation approach enables practical signal conditioning that works from 25 °C up to 500 °C.