MMIC HEMT Power Amplifier for 140 to 170 GHz

NASA's Jet Propulsion Laboratory, Pasadena, California

Figure 1 shows a three-stage monolithic microwave integrated circuit (MMIC) power amplifier that features high-electron-mobility transistors (HEMTs) as gain elements. This amplifier is designed to operate in the frequency range of 140 to 170 GHz, which contains spectral lines of several atmospheric molecular species plus subharmonics of other such spectral lines. Hence, this amplifier could serve as a prototype of amplifiers to be incorporated into heterodyne radiometers used in atmospheric science. The original intended purpose served by this amplifier is to boost the signal generated by a previously developed 164-GHz MMIC HEMT doubler [which was described in "164-GHz MMIC HEMT Frequency Doubler" (NPO-21197), NASA Tech Briefs, Vol. 27, No. 9 (September 2003), page 48.] and drive a 164-to-328-GHz doubler to provide a few milliwatts of power at 328 GHz.

Figure 1. This Three-Stage MMIC HEMT Amplifier occupies a chip area with dimensions of 1.1 by 1.9 mm.

The first two stages of the amplifier contain one HEMT each; the third (output) stage contains two HEMTs to maximize output power. Each HEMT is characterized by gate-periphery dimensions of 4 by 37μm. Grounded coplanar waveguides are used as impedance-matching input, output, and interstage-coupling transmission lines.

Figure 2. The Small-Signal S Parameters and Power Output of the amplifier were measured over its design frequency range.

The small-signal S parameters and the output power (for an input power of about 5 dBm) of this amplifier were measured as functions of frequency. For the small-signal gain measurements, the amplifier circuit was biased at a drain potential of 2.5 V, drain current of 240 mA, and gate potential of 0 V. As shown in the upper part of Figure 2, the small-signal gain (S₂₁), was found to be >10 dB from 144 to 170 GHz, while input and output return losses (S₁₁ and S₂₂) are both approximately 10 dB at 165 GHz.

For the power measurements, the amplifier circuit was biased at a drain potential of 2.1 V, a drain current of 250 mA, and gate potential of 0 V (these biases were chosen to optimize the output power). As shown in the lower part of Figure 2, the output power ranged from a low of about 11.8 dBm (≈15 mW) to a high of about 14 dBm (≈25 mW). The peak power output of about 14 dBm was achieved at

150 GHz at an input power of

6.3 mW, yielding a large-signal

gain of slightly less than 8 dBm.

This work was done by Lorene Samoska of NASA's Jet Propulsion Laboratory, and Vesna Radisic, Catherine Ngo, Paul Janke, Ming Hu, and Miro Micovic of HRL Laboratories, LLC. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Computers/Electronics category. NPO-30127