The use of electronic parts at cryogenic temperatures (<–100 ºC) for extreme environments is not well controlled or developed from a product quality and reliability point of view. This is in contrast to the very rigorous and well-documented procedures to qualify electronic parts for mission use in the –55 to 125 ºC temperature range. A similarly rigorous methodology for screening and evaluating electronic parts needs to be developed so that mission planners can expect the same level of high reliability performance for parts operated at cryogenic temperatures.

A formal methodology for screening and qualifying electronic parts at cryogenic temperatures has been proposed. The methodology focuses on the base physics of failure of the devices at cryogenic temperatures. All electronic part reliability is based on the “bathtub” curve, high amounts of initial failures (infant mortals), a long period of normal use (random failures), and then an increasing number of failures (end of life). Unique to this is the development of custom screening procedures to eliminate early failures at cold temperatures. The ability to screen out defects will specifically impact reliability at cold temperatures.

Cryogenic reliability is limited by electron trap creation in the oxide and defect sites at conductor interfaces. Non-uniform conduction processes due to process marginalities will be magnified at cryogenic temperatures. Carrier mobilities change by orders of magnitude at cryogenic temperatures, significantly enhancing the effects of electric field. Marginal contacts, impurities in oxides, and defects in conductor/conductor interfaces can all be magnified at low temperatures.

The novelty is the use of an ultra-low-temperature, short-duration quenching process for defect screening. The quenching process is designed to identify those defects that will precisely (and negatively) affect long-term, cryogenic part operation. This quenching process occurs at a temperature that is at least 25 ºC colder than the coldest expected operating temperature. This quenching process is the opposite of the standard “burn-in” procedure. Normal burn-in raises the temperature (and voltage) to activate quickly any possible manufacturing defects remaining in the device that were not already rejected at a functional test step. The proposed “inverse burn-in” or quenching process is custom-tailored to the electronic device being used. The doping profiles, materials, minimum dimensions, interfaces, and thermal expansion coefficients are all taken into account in determining the ramp rate, dwell time, and temperature.

This work was done by Douglas J. Sheldon of Caltech and John Cressler of Georgia Tech University for NASA’s Jet Propulsion Laboratory. For more information, contact This email address is being protected from spambots. You need JavaScript enabled to view it.. NPO-47933


NASA Tech Briefs Magazine

This article first appeared in the November, 2011 issue of NASA Tech Briefs Magazine.

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