Modules of electronic circuitry that perform the amplitude- and phase-control and the status-monitoring functions for eight-element (2 ×4) subarrays of K-band phased-array antennas have been developed as prototype building blocks for future phased-array antennas. These modules are characterized as, among other things, system-level integrated circuits (SLICs) because they reach a new level of functionality, previously achieved only by use of larger, heavier systems. This functionality is achieved through sophisticated design that incorporates monolithic microwave integrated circuits (MMICs) and other components and involves an unprecedented degree of integration of these components with regard, not only for electrical performance, but also for considerations as diverse as temperature control, size, weight, mass-producibility, reliability, cost, complexity of interconnections, and compatibility with other electronic equipment.
Exploiting recent advances in MMICs, photonics, and packaging, each SLIC module contains optoelectronic and electronic support and interface components and circuits integrated directly with radio-frequency (RF) components and circuits. Each SLIC module (see Figure 1) comprises a tilelike array of MMIC submodules plus supporting control and signal-distribution elements. All of these components are integrated into a single thin, lightweight package by use of the microwave high-density interconnect (MHDI) process, which is the enabling process for making tilelike phased arrays with the desired level of calibration and control.
Among the submodules in each SLIC module (see Figure 2) are four highly integrated dual-channel RF MMICs, each of which contains two phase shifters that operate under 3-bit digital control, two analog attenuators, shift registers for transmission of control data for adjustment of phases, analog automatic gain control (AGC) circuits, and status-monitoring circuits. Digital control signals and an RF signal are fed to the SLIC module via a single photonic link. This combination of signals is detected by a positive/intrinsic/negative (PIN) diode in the module, then separated by other circuitry into control and RF components. The RF signal is amplified and split eight ways to feed the four dual-channel RF MMICs. A peak detector at the output terminal of each channel on each RF MMIC samples the output signal level; this level is compared with a commanded level in the corresponding AGC circuit, which adjusts the setting of an attenuator to maintain the channel output at the commanded level.
This work was done by John Windyka and Ed Zablocki of Sanders for Lewis Research Center.
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Refer to LEW-16627.