Progress has been made in a continuing effort to develop a spaceborne computer system for processing readout data from a Fourier-transform infrared (FTIR) spectrometer to reduce the volume of data transmitted to Earth. The approach followed in this effort, oriented toward reducing design time and reducing the size and weight of the spectrometer electronics, has been to exploit the versatility of recently developed hybrid field-programmable gate arrays (FPGAs) to run diverse software on embedded processors while also taking advantage of the reconfigurable hardware resources of the FPGAs.

The specific FPGA/embedded-processor combination selected for this effort is the Xilinx Virtex-4 FX hybrid FPGA with one of its two embedded IBM PowerPC 405 processors. The effort has involved exploration of various architectures and hardware and software optimizations. By including a dedicated floating-point unit and a dot-product coprocessor in the hardware and utilizing optimized single-precision math library functions and a modified PowerPC performance library in the software, it has been possible to reduce execution time to an eighth of that of a non-optimized software-only implementation. A concept for utilizing both embedded PowerPC processors to further reduce execution time has also been considered.

This work was done by Dmitriy L. Bekker, Jean-Francois L. Blavier, and Paula J. Pingree of Caltech and Marcin Lukowiak and Muhammad Shaaban of Rochester Institute of Technology for NASA’s Jet Propulsion Laboratory. For more information, contact This email address is being protected from spambots. You need JavaScript enabled to view it.. NPO-45957


NASA Tech Briefs Magazine

This article first appeared in the December, 2008 issue of NASA Tech Briefs Magazine.

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