NASA has developed a system of hardware and software that can accommodate all necessary interfaces between (1) space-station flight computers and (2) a simulation host computer used in training, with the least host-computer processing overhead, least cost, and least complexity. This system is said to be "SIBless" because it does not include a simulation interface buffer (SIB). The SIBless design is specific to the hardware and software systems of the station; it could also be moderately useful as a basis for similar systems in other applications that involve training simulation computers and data-acquisition systems that process large amounts of input and output (I/O) information.
The original design for space-station trainers called for a hardware and software system — a simulation interface buffer (SIB) — that would enable the host computer (a general-purpose avionics computer) to interact with all required devices. However, a redesign of the space station greatly affected this original requirement and led to the so-called SIBless design (see figure). The SIBless design succeeds on two levels: First, it succeeds as a means of quantifying the performances of various I/O methods. The analysis method involved in the SIBless design makes it possible to understand the architecture of the simulation host computer (an SGI Challenge XL computer) and to quantify the performance of this computer in different design alternatives. This analysis results in an understanding of the "sweet spots" and "dead spots" in the I/O performance of this computer with various commercial off-the-shelf interface cards and programs. Test results match estimates within about 5 percent.
The SIBless design also succeeds as one that requires few interrupts per frame. Analysis of the performance of the simulation host computer in handling VersaModule Eurocard (VME) and POWERchannel hardware interrupts revealed a need to reduce the number of interrupts as much as possible. A review of 1553-standard board vendors and an analysis of 1553 traffic characteristics and the SGI VME performance lead to a design that stayed within the "sweet spot" of the simulation host computer for some of the 1553 traffic; it also resulted in no interrupts for any of the 1553 traffic. The final design of a Small Computer Systems Interface (SCSI) device driver required only 1 interrupt per frame instead of the original 26 interrupts per frame.
The novelty of the SIBless design is that it provides an example of how much I/O can be accomplished when a simulation host computer is used in real time and engineers employ a smart design. Although it is only a modified version of a previous design, the SIBless design succeeds on a couple of levels because it can contribute to significant cost and time savings. Unfortunately, its commercial applications are limited because it was designed for space-station support.
This work was done by Robert Horton and Cary Cheatham of Hughes Training and Dave Thornton of Loral for Johnson Space Center. MSC-22765