A transceiver has been developed to serve as a data-communication link between (1) the RS-232-standard serial communication port of a personal computer (PC) running the Windows 95 or Windows NT operating system and (2) a remote infrared transceiver that is capable of operation at a baud rate < MHz. The PC-to-transceiver communication is 115.2 kilobits per second, while the infrared communication is at 4 megabits per second.

The RS-232-to-Infrared Transceiver converts serial data streams between (a) a slower RS-232 electronic transmission medium and protocol and (b) a faster infrared transmission medium and protocol.

The transceiver includes a commercial off-the-shelf infrared transceiver module designed according to the Infrared Data Association (IrDA) standards, which were developed to promote compatibility among infrared networks for television receivers, computers, and other household devices. In the original application for which the transceiver was developed, there are requirements for small physical size and high flexibility of function for changing the PC baud rate and the sizes of transmitted data blocks. To satisfy these requirements, a programmable logic device (PLD) is included and is programmed with VHDL (very-high-speed integrated-circuit hardware description language).

One of the IrDA standard protocols dictates the use of a 16-bit header on each transmission, with consequent reduction of the effective data-throughput rate. However, the transceiver module is not operated according to this protocol; instead, to increase the data-throughput rate, a protocol that eliminates the 16-bit header was developed and is implemented in the PLD by use of VHDL.

The transceiver circuitry (see figure) consists of seven main subsystems:

  1. Voltage Regulator - This circuit converts 9-Vdc power from a wall transformer unit to 5-Vdc power used by the other subsystems.
  2. RS-232 Voltage-Level Converter - This circuit converts RS-232 transmitting (TxD) and receiving (RxD) ±10-Vdc logic levels to +5/0-Vdc logic levels used in the PLD.
  3. System Clock - The system clock operates at a frequency of 32 MHz (instead of 4 MHz) because 8 × over-sampling of the 4-MHz received infrared signal is required for the 4-MHz receiving logic in the PLD. The system clock also provides a master clock signal that is divided in frequency down to 921.6 kHz to enable 8 × over-sampling for the 115.2-kilobaud RS-232 receiving logic.
  4. Infrared Transceiver Module - This module contains an infrared light-emitting diode (LED) and an optically gated transistor that operate at the same wavelength. Because it is an IrDA-standard module, it is compatible with commercial electronic devices.
  5. The PLD - The PLD contains all the logic circuitry needed for conversion between an RS-232 data stream and a faster infrared data stream. Thus, most of the functionality of the transceiver is implemented in the PLD.
  6. Configuration EPROM - The configuration erasable programmable read-only memory (EPROM) is used to reconfigure the logic in a the PLD, which logic is based on a static random-access memory (SRAM). Each time power is turned on, the PLD is configured with its hardware logic. Changes in the logic are implemented by changing or reprogramming the configuration EPROM.
  7. PC Programming Connector - This is a socket for a cable connection to enable the use of a PC to program the PLD. This socket is used temporarily — during development — for configuring the PLD directly from a PC without reprogramming the EPROM.

This work was done by Brandon Dewberry and Kosta Varnavas of Marshall Space Flight Center.

This invention is owned by NASA, and a patent application has been filed. For further information, contact Sammy Nabors, MSFC Commercialization Assistance Lead, at (256) 544-5226 or This email address is being protected from spambots. You need JavaScript enabled to view it.. Refer to MFS-31331.


NASA Tech Briefs Magazine

This article first appeared in the June, 2000 issue of NASA Tech Briefs Magazine.

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