A proposed complementary metal oxide/semiconductor (CMOS) photodiode integrated-circuit imaging device of the active-pixel-sensor (APS) type would include column feedback sub-circuits that would make it possible to reduce readout noise (thereby making it possible to image at lower light levels) without reducing (and possibly even increasing) full-well capacity (thereby making it possible to obtain wide dynamic range). Heretofore, as described below, low-noise design requirements have generally conflicted with wide-dynamic-range design requirements.

To increase the quality of imaging at low illumination, one must increase quantum efficiency while reducing readout noise. To obtain wide dynamic range (necessary for imaging a high-contrast scene), one must increase the full-well capacity (the number of electrons that each pixel can hold without saturating and overflowing). Unfortunately, a major component of the readout noise of a photodiode APS is the sensing-node reset noise, which is given by (kTCS)1/2/q, where k is Boltzmann's constant, T is the absolute temperature, CS is the sensing-node capacitance, and q is the electronic charge. Also unfortunately, in order to increase the full-well capacity, it is necessary to increase CS. As a result, heretofore, the requirement for low noise (which translates to a requirement for low CS) has conflicted with the requirement for large full-well capacity (and thus large CS).

Soft Reset With Column Feedback is the key to low noise and wide dynamic range in this proposed circuit.

The proposed circuit (see figure) would implement a soft-reset scheme in which the pixels in a given column would be reset to a level determined by column feedback. (In soft reset, both the drain and the gate of an n-channel reset transistor are kept at the same potential.) Each pixel would contain three field-effect transistors (FETs) [Msf, Msel, Mrst] that would be conventional for an APS to minimize the difference between the potential on the column bus and the potential on a reference bus. The reference bus would be common to all columns and would be held at a fixed dc level, VREF. Under feedback, the potential on the gate of Mrst would be adjusted continuously so that the pixel output would reach the potential set by VREF. By choosing a column feedback amplifier with a large gain, one could obtain a large feedback factor during soft reset, with consequent suppression of reset noise by a large factor. Thus, reset noise could be reduced to a level much less than (kTCS)1/2/q. Taking advantage of the large reduction in noise, one could increase full-well capacity without incurring a noise penalty.

Because (1) the additional circuitry (beyond that of a conventional APS) needed in each pixel would be only one additional FET and one additional conductor line and (2) the column feedback amplifiers would be located at the ends of the columns rather than in the pixels, incorporation of the column feedback sub-circuits would entail minimal changes in pixel circuitry that would not compromise quantum efficiency or pixel size. Hence, the proposed imager could feature an unprecedented combination of high quantum efficiency, low noise, small pixel size, and large full-well capacity, all contributing to high performance.

This work was done by Bedabrata Pain, Thomas Cunningham, Bruce Hancock, Suresh Seshadri, and Monico Ortiz of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.nasatech.com/tsp under the Electronic Components and Systems category.

In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to

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Refer to NPO-21111, volume and number of this NASA Tech Briefs issue, and the page number.

This Brief includes a Technical Support Package (TSP).
Photodiode CMOS Imager With Column Feedback Soft Reset

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This article first appeared in the December, 2002 issue of NASA Tech Briefs Magazine.

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