During simulation, the Rx Message Loss Rate block displays packet loss rate for receive buffer. As Figure 5 shows, the packet loss rate at the receive buffer is 6%, which does not satisfy the QoS requirement of 1%.

To study the effect of memory size on this packet loss rate, we simulate this system with increased memory size. The following packet loss rates are observed for these simulation runs:


These results indicate that packet loss rates decrease as memory size increases. As a system engineer, however, you might want to explore other techniques to reduce the packet loss rate, such as implementing prioritized regulation of messages (dropping low-priority messages before high-priority messages) and clearing the oldest messages from a buffer when the buffer size crosses the threshold.

Benefits of this Approach

This article illustrates the value of discrete- event simulation using SimEvents to perform the following design tasks:

  • Identify constraints on shared resources and bottlenecks in a system.
  • Simulate the effects of variable input traffic, such as congestion, packet loss, and increased end-to-end latencies.
  • Explore different design techniques and algorithms to optimize resource allocation.

The real strength of this approach comes from the integration of Sim Events with MATLAB and Simulink. In addition, integration with tools such as SystemTest and Stateflow enable many other design tasks, such as Monte Carlo analysis or implementing control logic in event-driven systems for Model-Based Design.

This article was written by Anuja Apte, Product Marketing Manager, The MathWorks, Inc. (Natick, MA). For more information, contact Mr. Apte at This email address is being protected from spambots. You need JavaScript enabled to view it., or click here.