A key interface feature of all of the current Virtex generations is gigabit serial transceivers. Originally named RocketIO MGTs and now GTX and GTH transceivers in the Virtex-6, these interfaces operated at 6.5 Gbits/sec and 11 Gbits/sec, respectively. Gigabit serial connections provide an essential high-speed interface for moving data on and off the FPGA. These interfaces can be used to implement different protocols, such as PCI Express, Serial RapidIO and Xilinx’s own Aurora, a license-free, lightweight protocol ideal for fast point-to-point data connections. Like the SelectI/O, gigabit transceivers have remained similar in number, a maximum of between 16 and 20 on the 35mm square devices of the generations we’ve been comparing. One exception to this is the specialized high bandwidth families beginning with the Virtex-5. To satisfy applications with complex data routing and switching requirements, Xilinx introduced the Virtex-5 TXT family with up to 48 GTX transceivers and the Virtex-6 HXT family with up to 48 GTX and 24 GTH transceivers.
With PCI Express rapidly becoming more prevalent in systems from desktop PCs to targeted digital signal processing subsystems, Xilinx has included integrated PCI Express cores designed to support the gigabit serial transceivers. Virtex-6 supports PCI Express Base Specification 2.0 in x1 through x8 configurations.
Tapping Into Performance
Up to this point weíve been comparing the relative merits of the three most recent Virtex generations, but how does this performance map into actual applications?
A key benefit of FPGAs is the ability to create a high-speed board interface inside the FPGA, tightly coupled to the processing, to stream data on and off the board. A common board form factor used in military applications is the PMC/XMC module. In the case of PMCs this is a PCI or PCI-X interface; for XMCs PCI Express is most common. Unfortunately these interfaces do require a considerable amount of FPGA resources. For both the Virtex4- and -5 devices, a practical solution was to use two FPGAs on the module — one dedicated to processing data and one to implement the board interface. With the higher density of the Virtex-6 devices, it now becomes practical to include processing and interface in one device, simplifying board design and reducing the cost of the PMC/XMC module.
A typical PMC/XMC module used in software defined radio systems is the Pentek Model 7151 Quad 200 MHz, 16-Bit A/D. A key feature of this module is the FPGA based digital down converter. Instantiated in the largest SXT Virtex-5 part, the maximum number of channels achievable is 256. As this architecture migrates to the Virtex-6 SXT family, we will see a 2 to 3 times increase in channel count, an immediate, tangible improvement in performance and a large cost savings as the number of boards in a system can be reduced.
In radar systems and high bandwidth recording systems, where 10- or 12-bit A/Ds are operating at greater than 1 GHz sample rates, a Gen1 PCI interface can quickly become a bottleneck. Even in a single channel application, data streams can exceed 2 GBytes/sec. The Virtex-6 integrated Gen2 PCI interface helps alleviate this obstacle with transfer rates up to 4 GBytes/sec in an x8 lane configuration.
Each new generation of FPGA is enabled by a range of technical advances. These span broad improvements like power reduction and device density to the intricacies of including a pre-adder in the DSP block to streamline filter design. But even from just looking at the few metrics compared in this article, it’s easy to see the ongoing progression of FPGA technology and why FPGAs continue to be a preferred platform for digital signal processing.