As PC/104 celebrates its 20th anniversary as an open standard this year, it continues to grow in terms of new design-ins, applications, and integration of the latest technology. In today’s fast paced, throw-away world, this is a remarkable achievement. PC/104 users typically demand a long product life cycle of seven years or more, so for two decades, these small, stackable, embedded computer systems have found applications in military, medical, industrial, transportation, communications, pipelines, mining, utilities and a host of other industries. However, as technology changes and becomes more powerful and complex, challenges arise in implementation. This has never been truer than for the different implementation strategies for PCI Express on PC/104 size modules.

In the Beginning

EBX SBC with SUMIT-AB and PC/104 ISA Bus (top edge)
PC/104 has grown and matured from technologies originally developed for the desktop and mobile markets. In 1992 when the first PC/104 specification was written, only the ISA bus was available as the building block for the first generation of stackable embedded PC modules. There was no PCI, USB, SATA, PCI Express (PCIe), wireless networking or other technologies that we now take for granted. Years later, the 32-bit, 33 MHz PCI bus was added to support higher speed I/O on PC/104 modules, resulting in the second generation specifications called PC/104-Plus (both PCI and ISA buses) and PCI-104 (PCI bus only). This was implemented by adding a second, 120-pin connector that was placed on the opposite side of the board from the original 104-pin, PC/104 connector. And now with even higher bandwidth PCI Express technology, we have seen the dawn of the 3rd generation of stackable PC/104 modules.

But since high speed peripheral interconnects have moved from PCI to PCI Express, the question became “What is the best way to implement PCI Express on a PC/104-size card?” A thorny problem arose with respect to where you put the new PCIe connector on the board. High-speed signal integrity connectors are required to pass the differential pair signals; certainly the rugged pin-in-socket style connectors cannot be used once again. Also when you add PCIe support, do you remove either one or both of the PC/104 and PCI-104 connectors? If you remove those connectors, then what happens to compatibility and what is the migration path for all the existing boards being manufactured or deployed in systems in the field?

Parting of the Ways

Kontron MSM-LP, a PCI/104-Express™ SBC with Intel® Atom™ processor D525/D425
In 2007, numerous philosophical and architectural disagreements occurred within the PC/104 Embedded Consortium’s Technical Committee during the discussions of how to add a stackable PCI Express connector to PC/104 modules. Eventually the companies separated into two groups. Both groups agreed that for migration of existing systems, one connector should stay but they disagreed about which one should be replaced with the PCIe connector. One group felt that the low-cost PC/104 connector should remain while the other believed it should be the higher bandwidth PCI-104 connector. The former's logic was “why support both PCI and PCIe expansion on a single module” since it seemed redundant and costly, and the migration is transparent to application software. They argued that 70 to 80% of I/O modules in the vast ecosystem supported the PC/104 connector rather then the PCI-104. They said their solution would be an evolutionary migration with the least impact upon the current users.

The other group said why support the existing PC/104 rather than the PCI-104 connector since most current chipsets no longer directly support those signals and they must be generated from a bus bridge chip on the LPC (Low Pin Count) bus. They said an equally viable solution would be to support the existing PC/104 cards by adding another card in the stack with a PCI to ISA bridge chip. Both groups agreed that over time, the PC/104 and PCI-104 connector- based solutions would decrease as the newer stackable PCIe solutions increased. However, no one could project a timeline in which this would occur.