Software defined radio technology has been widely adopted for new military and aerospace platforms, government signal intelligence and homeland security systems, and now more extensively in commercial wireless voice and data networks as well. These modern communication systems need to squeeze more channels of traffic into an expensive slice of precious radio spectrum. Military and government requirements for secure communications mandate real-time encryption and decryption schemes that must be increasingly more resistant to interception. In multinational theater of war combat operations, communications systems must selectively ensure certain specific links and reliably deny others.

Pentek Model 4207 VME/VXS I/O Board

As a result, communications systems are increasingly shifting towards digital modulation using advanced spread-spectrum code modulation schemes that require transmission channels with wider bandwidths. These new wideband schemes, coupled with the exploding market demand for additional channels for video, voice, and data services, pushes software radio systems toward higher speed A/D and D/A converters, more powerful DSP resources, and faster system interconnects between components and between system boards. FPGAs deliver an excellent solution to all of these difficult demands and, as a result, now play key roles in virtually all new software radio systems.

Software Radio Drives FPGA Technology

As soon as they became available, hardware design engineers began to take advantage of FPGAs (field programmable gate arrays) for connecting high-speed software radio peripherals like wideband A/D and D/A converters, digital receivers, and communication links to programmable processors in embedded real-time systems. Because of their flexibility, FPGAs are especially well suited to handle the clocking, synchronization, and other diverse timing circuitry needed to tame these specialized devices. In addition, FPGAs are excellent for data formatting tasks like serial-to-parallel conversion, data packing, time stamping, multiplexing, and packet formation. Shrinking die geometries and other advances in chip technology have made FPGA silicon much faster and denser. But more importantly, the addition of new high-performance DSP resources and interfaces marked a watershed event that dramatically changed the architectural paradigm of software radio systems.

FPGAs are now incorporated in software radio products primarily for their digital signal processing engines and new gigabit serial fabric engines, thus stealing the spotlight from the more mundane traditional roles that they still serve admirably. Without exception, the latest device offerings from major FPGA vendors offer second or third generation DSP blocks. They include extended precision multiplier/accumulators, advanced arithmetic units, logic engines, and flexible memory structures that can be tailored into block memory, dual-port RAM, FIFO memory and shift registers.

While these DSP capabilities of new FPGAs are truly remarkable, several other significant features add even more benefits to software radio applications. Onboard serial gigabit transceivers and channel coding/decoding engines support the emerging switched serial fabric protocols that are quickly replacing conventional parallel buses and backplanes for high speed inter-chip and interboard data transfers. Other new features include onboard programmable RISC processors that can execute code for local supervision and control functions, thus greatly reducing the need for an external host processor. These processors slash loop latencies to deliver much tighter real-time control systems. Ethernet MACs (media access controllers), incorporated as I/O resources for the latest generation FPGAs, simplify TCP/IP communication links to a wide range of host processors and various operating systems. Finally, complete switched fabric engines supporting protocols such as PCI Express save valuable FPGA resources for other signal processing tasks.

Evolution of New FPGA Features

Figure 1. Evolving Software Radio Resources of Xilinx FPGAs.

FPGA vendors constantly strive to outdo their competition in an exciting race to provide features that deliver maximum performance and specific benefits. Winning this race, however, is a complex and elusive goal. Many different types of resources are now found in FPGAs including block RAM, distributed RAM, DSP blocks, logic blocks, microcontrollers, gigabit ports, I/O drivers and pins. Trying to find a single optimum ratio of resources is futile because each application requires a different mix. For example, the design engineer selecting the best part for a logic-intensive application will avoid an FPGA device heavily burdened in cost and power with a wealth of powerful DSP blocks. As a compromise, vendors have developed multi-pronged product offerings, each targeting different classes of applications.

After the Virtex-II Pro family, Xilinx began using this strategy with the Virtex- 4 family, splitting the devices into three sub-families, each emphasizing distinct application spaces. In its latest Virtex-5 family, Xilinx now offers four distinct sub-families, each with its own special blend of resources. Devices within three of these four sub- families have been released so far.

The Virtex-5 LX devices provide an ample quantity of logic slices but offer no gigabit serial interfaces. The LXT and SXT devices add the gigabit serial interfaces, along with PCI Express fabric end-point engines to simplify system connectivity. Like the LX and FX families in the Virtex-4 family, the Virtex-5 LXT and SXT devices offer maximum resources for logic and digital signal processing algorithms, respectively. The yet unreleased FXT devices should follow suit with the Virtex-4 FX devices by providing 405 PowerPC processor cores and other resources well suited for embedded systems. The chart in Figure 1 summarizes the highlights of the evolving resources in three successive generations of Xilinx FPGAs.

Putting FPGAs To Work

Taking advantage of these resources for a high-performance software radio product illustrates the usefulness of the sub-family differentiation. Shown in Figure 2 is the Model 7142 PMC (PCI Mezzanine Card) module suitable for use in many different types of embedded software radio systems, including PCI, VME, and CompactPCI card cages. The XMC extension to PMC defined by VITA 42 offers gigabit serial links supporting the new popular switched fabric protocols.

Four 125 MHz 14-bit A/D converters and one 500 MHz 16-bit D/A converter provide analog IF (intermediate frequency) signal interfaces to external analog RF up and down converters and RF amplifiers for ultimate connection to the antenna. Real-time digital signal processing tasks such as digital up and down conversion, modulation and demodulation, encoding and decoding, and other operations are often all performed using FPGA-based DSP resources.

Figure 2. Model 7142 Virtex-4 Software Radio PMC/XMC Mezzanine Module.

All PMC modules require a PCIbus interface. However, if the interface is equipped with DMA controllers and FIFO buffers, they can dramatically improve performance by initiating efficient data transfers between the PCI bus and the many peripherals on the module. To qualify as an XMC module, the unit must include gigabit serial transceivers and some facility for implementing a serial fabric and/or protocol.

Commencing just before the availability of Virtex-5 devices, the design cycle of this product dictated the use of the Virtex- 4 family. The only Virtex-4 sub-family that met all of the requirements was the versatile FX series, so it became an obvious choice for this product. Nevertheless, the FX family is quite limited in DSP capability compared to the SX family. Even the largest member of the FX family has only the same number of XtremeDSP slices as one of the smaller SX devices. Since customer access to ample DSP horsepower was a critical factor, an SX55 device was added to the PMC module, significantly boosting the total quantity of DSP slices from 192 to 704.

After incorporating the SX55 to handle real-time digital signal processing for the A/D, D/A, and SDRAM, those peripherals were attached directly to it by choosing the most appropriate interface type. Therefore, the FX device became the natural candidate for the PCI interface, DMA controller, and giga-bit serial interface. To speed development time and ensure full compatibility with all PCI 2.2 PCIbus specifications, the PCI interface for the FX device incorporated an off-the-shelf IP core. Because of the many different peripherals and devices, the local side of the PCI core is supported with a custom 9-channel DMA engine and FIFO buffers. This provides a dedicated logical channel to and from the PCI bus to manage multiple streams and simplify transfers.

Memory resources include three 256 MB DDR2 SDRAMs to support circular buffers for implementing digital delay memories, which are extremely popular for signal intelligence applications. These memories can also be used for capturing transients from the A/D converters for radar signal acquisition, or for storing waveforms that can be played in real-time out through the D/A converter to create an arbitrary waveform generator. A third-party SDRAM controller IP core was installed in the SX device to manage the critical clock, control, data and address interfaces, thereby eliminating that chore from the design effort.

The gigabit serial interfaces of the FX were organized into two groups of four bi-directional serial bit lanes to form two 4X ports. Supported by the internal 8B10B channel coding circuitry, these ports form the physical and transport layers of XMC standard. IP cores can be installed to implement specific switched fabric standards including SerialRapidIO, PCI Express and others. Operating at bit clock rates up to 3.125 GHz, these I/O facilities eliminate many of the data flow bottlenecks that frequently plague real-time software radio systems.

Two high-speed parallel data buses join the two FPGAs. The 64-bit local bus supports traffic to and from the PCI interface sustaining rates up to 133 MHz. Three 32-bit buses use source synchronous digital interfaces for moving data between them at up to 600 MHz to support the full 2.5 GByte/sec streaming transfer rate of the XMC ports.

Judicious choices of Virtex-4 sub-family members to meet specific needs of the hardware and target applications satisfied all of the product design objectives. An additional bonus arises from the "footprint" consistency between certain members of different Virtex-4 sub-families. Since the SX55 and the LX100 share a common printed circuit board pattern, or footprint, this module can be assembled with either device. For applications requiring maximum amount of logic resources, simply replacing the SX55 with the LX100 device can double the number of logic slices.

Summary

As software radio technology drives an increasingly diverse array of commercial, industrial, military and government electronic systems, the new features and inherent flexibility afforded by FPGAs deliver an excellent solution. A wealth of IP core offerings for highly-optimized algorithms, interfaces, and protocols help COTS board vendors shorten their time to market, and help systems integrators add critical functions to these FPGA-based COTS products for specialized turnkey applications. Each new FPGA generation promises both a higher density of existing resources and the emergence of new types of resources to add even more performance to embedded software radio systems.

This article was written by Rodger Hosking, Vice President and co-founder of Pentek, Inc. (Upper Saddle River, NJ). For more information, contact Mr. Hosking at This email address is being protected from spambots. You need JavaScript enabled to view it., or click here .


Embedded Technology Magazine

This article first appeared in the September, 2008 issue of Embedded Technology Magazine.

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