Many commercially available advanced-technology CMOS and bipolar integrated circuits are susceptible to single-event latchup (SEL) effects caused by heavy ions or protons from cosmic rays or solar flares, making them unsuitable for satellite applications. Remanufacturing the integrated circuits in an inherently SEL-immune process has been an expensive and technically difficult option, as is the alternate option of incorporating latchup protection and recovery circuitry in the spacecraft system's electronics.

Space Electronics Inc. has developed several different circuits that provide protection and recovery of integrated circuits known to exhibit single-event-induced latchup. These circuits are integrated within the same package as the susceptible integrated circuit using multichip module (MCM) and modern packaging technology, resulting in a device-level solution providing minimum cost and minimum impact on the system

The Latchup Protection Technology (LPT™) circuit was designed to provide current limiting to the device, detect the increase in current during the SEL event above a preset threshold, force a shutdown when the threshold is exceeded, hold the device in the shutdown mode for a preset time interval, and return the device's supply voltage to its original operating level.

The LPT circuitry (patent pending) has the potential to be applied to a wide variety of susceptible devices. The specific implementation details such as current latchup protection threshold and supply off time are determined by characterization of the susceptible devices at a heavy ion facility. The LPT device converts a single-event latchup into a recoverable event.

Two devices were evaluated with LPT: the ADS7805 16-bit analog-to-digital converter and the Gatefield GR10009 9000-gate flash programmable gate array. The first was selected for latchup protection, and the preliminary circuit design and analysis was based on protecting the ADS7805 device, which is susceptible to SEL at low linear energy transfer levels.

The ADS7805 integrated circuit draws current from an analog and digital supply pin. The LPT circuit must sense the current into the supply pins, and, when the latchup current threshold is exceeded, remove the supply voltage from the latched device. During the time that the supply voltage is removed from the device, the supply current draw will come exclusively from the LPT circuit. After a set time interval required for the latchup to clear, the LPT circuit reapplies the supply voltage to the device and normal operation is restored.

The figure shows the supply current with and without a protection circuit during a single-event latchup. The LPT circuit will have a latchup current threshold, Ithreshold, an activation delay time, tD, and recovery time tREC. The LPT circuit is activated when the supply current exceeds the Ithreshold value; the supply current is turned off (grounded) within time tD after Ithreshold is reached. The device is off for time period tREC. This can be compared with the unprotected latchup supply current response shown in the figure, where the normal operating current rises to the latchup current in response to a single-event latchup.

Heavy ion characterization and validation of the ADS7805 with the LPT circuitry was performed using the Jet Propulsion Laboratories Californium-252 source at Pasadena, CA, and also using the Texas A&M University cyclotron facility. Latchup protection and recovery of the ADS7805 was demonstrated at both. Peak latchup current was measured between 146 and 267 mA and device recovery as shown with supply off times of 45 μs and 2.5 ms. Additional validation testing was performed by NASA Goddard Space Flight Center.

This work was done by P.J. Layton, D.R. Czalkowski, J.C. Marshall, H.F.D. Anthony, and R.W. Boss at Space Electronics Inc., 4031 Sorrento Valley Blvd., San Diego, CA 92121; (619) 452-4167. RAD-PAK is a registered trademark of Space Electronics Inc. LPT is a trademark of Space Electronics. This work was partially supported by NASA contract no. NAS8-97186.