As signal rates approach 50 Gb/s, bandwidth demand has outpaced conventional circuit boards. Engineers are now turning to PAM4 signaling rather than conventional NRZ as the most viable solution to these design challenges.

BERTs, such as this one, consist of precision pulse pattern generators (PPGs) and sensitive error detectors (EDs).

Since bit error rate (BER) is the ultimate judge of signal integrity, tests of PAM4 components and systems are performed by BERTs consisting of precision pulse pattern generators (PPGs) and sensitive error detectors (EDs). To satisfy this application, the PPGs must transmit signals with specific signal impairments for receiver tolerance testing, and the EDs must serve as golden reference receivers and signal quality analyzers for transmitter testing.

As its name implies, PAM4 is a 4-level signal scheme that encodes two logic bits in each of its 4 symbols. Since each PAM4 symbol occupies the same unit time interval as an NRZ symbol, PAM4 doubles the data rate without altering the bandwidth. Each PAM4 symbol encodes a unique pair of bits, an LSB (least significant bit) and an MSB (most significant bit).

To meet these new challenges, emerging PAM4 standard specifications relax the raw BER requirements from the usual BER < 1E-12 to BER < 1E-6 without losing performance by employing FEC (forward error correction). FEC requires additional overhead of about 5.5% in parity-like bits but can correct a raw BER of 1E-6 to a net BER of 1E-15 or better.

Where NRZ test patterns are pseudorandom binary sequences (PRBS), PAM4 uses pseudo-random quaternary sequences (PRQS). PRBSn test patterns include pseudo-random combinations of n bits (a total of 2n-1 bits); PRQSm patterns have pseudo-random combinations of m symbols. PRQSm PAM4 test patterns are generated by combining two NRZ PRBSn patterns.

PRQS Test Patterns

To acquire the most accurate data, pattern generators apply PAM4 emphasis separately to the LSB and MSB NRZ data streams with a 4-tap emphasis module prior to a PAM4 converter.

The preferred test pattern for NRZ signals at 16+ Gb/s has always been PRBS31; PAM4 patterns are comprised of two PRBS31s. Since the pattern is more than 2 billion symbols, oscilloscopes are ill-suited for the application. The limited memory depth of real-time oscilloscopes and the low sampling rates of equivalent-time oscilloscopes prevent them from making accurate measurements on test patterns longer than a few million symbols. BERTS, such as the one shown in Figure 1, with 256 Mb of test pattern memory, support PRQS15 BER measurement of every single bit and PRQS31 BER measurement of all MSB bits.

SSPR Test Patterns

To address oscilloscope limitations, the SSPR (short stress pattern random) pattern has been proposed. It contains enough random sequences to probe the receiver performance baseline wander margins and timing content. The SSPR pattern is of limited use in serdes testing. PRQSm PAM4 patterns can be created on silicon with simple shift registers for serdes self-testing. PPGs with 256 Mbit of user-defined PAM4 pattern memory can generate a huge array of unique test patterns for probing any combination of a serdes’ AC coupling, clock recovery, equalization, and symbol decoder.

Other test patterns are used for PAM4 signal evaluation. JP03A is a clock-like sequence of alternating V0 and V3 symbols to measure CRCrms (rms clock random jitter) in transmitter tests or to calibrate it for receiver tests. JP03B consists of 15 alternating V0 and V3 symbols followed by 16 alternating V3 and V0 symbols. A clock-like sequence of alternating V0 and V3 symbols with a single pair of V3 symbols in its center can be used to measure half period F2 jitter (even-odd jitter) in transmitter tests or to calibrate it for receiver tests.

Emphasis and FFE

Eye-opening effect of PAM4 transmitter emphasis.

Eye closure due to inter-symbol interference (ISI) is caused by the channel's frequency dependent loss. Just as equalization has been used in NRZ systems to open eye diagrams by compensating for the frequency response, it is also used to open the three eye diagrams of PAM4 signals.

The simplest approximation of the channel response is a low pass filter. The idea of transmitter feed-forward equalization (FFE) is to counter this low pass effect by emphasizing high-frequency signal components.

Two-tap emphasis is the simplest form of transmitter FFE. Symbols that undergo transitions are transmitted at higher amplitudes than those that follow. Transmitter emphasis can be applied in varying amounts to any number of symbols prior to or after a transition. Most emerging PAM4 specifications require 2- to 4-tap transmitter emphasis.

Voltage sampling points.

Two equalization schemes are used at the receiver. A continuous time linear equalization (CTLE) applies a simple filter to suppress low-frequency signal components and amplify high-frequency components. Decision feedback equalization (DFE) feeds the decoded symbol values back through the symbol decoder to further reduce ISI.

To acquire the most accurate data, pattern generators apply PAM4 emphasis separately to the LSB and MSB NRZ data streams with a 4-tap emphasis module prior to a PAM4 converter, as shown in Figure 2. The eye-opening effect of PAM4 transmitter emphasis is shown in Figure 3.