The single-photon counting imaging sensor is typically an array of silicon Geiger-mode avalanche photodiodes that are monolithically integrated with CMOS (complementary metal oxide semiconductor) readout, signal processing, and addressing circuits located in each pixel and the peripheral area of the chip. The major problem is its “single-event” method for photon count number registration. A single-event single-photon counting imaging array only allows registration of up to one photon count in each of its pixels during a frame time, i.e., the interval between two successive pixel reset operations. Since the frame time can’t be too short, this will lead to very low dynamic range and make the sensor merely useful for very low flux environments. The second problem of the prior technique is a limited fill factor resulting from consumption of chip area by the monolithically integrated CMOS readout in pixels. The resulting low photon collection efficiency will substantially ruin any benefit gained from the very sensitive single-photon counting detection.

Structure of a multiple-event Single-Photon Counting Imaging Sensor implemented using flip-chip bump bonding technique.
The single-photon counting imaging sensor developed in this work has a novel “multiple-event” architecture, which allows each of its pixels to register as more than one million (or more) photon-counting events during a frame time. Because of a consequently boosted dynamic range, the imaging array of the invention is capable of performing single- photon counting under ultra-low light through high-flux environments. On the other hand, since the multipleevent architecture is implemented in a hybrid structure, back-illumination and close-to-unity fill factor can be realized, and maximized quantum efficiency can also be achieved in the detector array.

A multiple-event single-photon counting imaging sensor consists of a readout chip and a single-photon counting detector array (see figure) integrated in stack using flip-chip bump bonding, direct wafer bonding, or other 3D integration technologies. Supported by the state-of-the-art CMOS technology, each of the readout pixels can contain several hundred transistors in the area of the pixel. These transistors can compose a 20-bit digital counter, a related latch of the same bits, an active quenching circuit consisting of a delay inverter and a reset circuit, and an exposure control circuit for registration of up to one million photon counts during a frame time.

The architecture will be slightly changed if a self-quenching single-photon counting detector array is used, where the external quenching circuit of the readout circuit is replaced by a simple MOSFET (metal-oxide semiconductor field-effect transistor) load. As a result of the substantial change of treatable photon- counting number during a frame time from one of the prior art to 106 of the invention, the dynamic range of the imaging sensor will increase by 120 dB. Hence, a multiple-event single-photon counting imaging sensor can attain an unprecedentedly high dynamic range of around 160–180 dB. The resulting dynamic range has excellent linearity through its whole range. Unlike the prior high dynamic range techniques that rely on logarithmic operation on analog signal and have exponentially decayed grayscale resolution towards high light level, the multiple-event single-photon imaging sensor will show high and uniform grayscale resolution through the whole dynamic range. Subtle grayscale variation at even very high light levels, e.g., the contrast of a bright object and a slightly brighter object in one scene, can be distinguished by this unique capability.

Separation of the detector array from the readout chip makes it possible for the detector array to attain maximized photon collection efficiency. Photon collection efficiency is mainly the product of fill factor and quantum efficiency of the detector. The detector array of the multiple-event single-photon counting imaging sensor has a back-illuminated structure and a near 100-percent fill factor. The absorption layer of the detector can be tuned within a wide range of thicknesses to maximize the quantum efficiency for the interested wavelength.

While the readout chip is implemented using silicon CMOS technology, the single-photon counting detector array can be built on silicon or other semiconductor materials such as InGaAs/InP, HgCdTe (MCT), or GaN/GaAlN. With such flexibility, this technique can cover a wide range of wavelengths from the ultraviolet through mid-infrared.

This work was done by Xinyu Zheng, Thomas J. Cunningham, and Chao Sun of Caltech; and Kang L. Wang of UCLA for NASA’s Jet Propulsion Laboratory. NPO-45747


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This article first appeared in the November, 2011 issue of Photonics Tech Briefs Magazine.

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