A modular, integrated, completely solid-state system designed to harvest and store solar energy is under development. Called the "power tile," the hybrid device consists of a photovoltaic cell, a battery, a thermoelectric device, and a charge-control circuit that are heterogeneously integrated to maximize specific energy capacity and efficiency. Power tiles could be used in a variety of space and terrestrial environments and would be designed to function with maximum efficiency in the presence of anticipated temperatures, temperature gradients, and cycles of sunlight and shadow. Because they are modular in nature, one could use a single power tile or could construct an array of as many tiles as needed. If multiple tiles are used in an array, the distributed and redundant nature of the charge control and distribution hardware provides an extremely fault-tolerant system.

A Power Tile would include energy-harvesting, energy-storing, and temperature-regulating parts integrated into a compact package.

The figure presents a schematic view of the device. High-efficiency photovoltaic cells would be attached to a thin-film array of thermoelectric devices, which, in turn, would be integrated to a multi-layer thin-film solid-state battery packaged in a thermally conductive envelope. The charge control circuitry would be integrated either onto the battery side of the device or into a protective frame that would enclose the device. The entire package is designed to be less than 2 mm thick.

The thermoelectric devices would harvest some of the thermal energy incurred when solar radiation raises the temperature on the photovoltaic-cell side relative to the shaded backside. The battery would be placed on that opposite side, and the outer surface of its thermally conductive envelope would be coated with a thermally emissive material to aid in creating the greatest possible temperature differential for optimum operation of the thermoelectric device. The same thermoelectric devices could also be operated in a power-consuming, heat-pump mode to keep the batteries within a desired operational temperature range during intervals of darkness/cold. Microthermoelectric devices that are no more than 500 μm thick are currently under fabrication for intended integration into the power tile device.

The solid-state battery system performs nominally in the temperature range of -20 to 60 °C, and has been shown to function at limited discharge rates to temperatures as low as -40 °C. These thin-film solid-state cells, based on materials systems originally developed at Oak Ridge National Laboratories in the 1990's, are capable of over 30,000 charge/discharge cycles without appreciable capacity fade, and can withstand intermittent heating and cooling to temperatures above 100 °C and below -40 °C.

To achieve high efficiency, the photovoltaic, thermoelectric device and the microbattery need to operate coherently. A smart power silicon chip, currently under development at JPL, will ensure the coherent operation of the energy generating and storage devices within the power tile system. This chip includes three synchronized high-efficiency DC-DC voltage converters for producing common voltage from the three sources, a battery-charging circuit, a thermoelectric heater driver circuit, and all the necessary sense and control circuits to produce the synchronized operation.

A prototype power tile, fabricated at JPL, has dimensions of 3 cm by 3 cm by 3 mm. The dual-junction photovoltaic cell in this power tile is capable of delivering a current of 125 mA at a potential of 2.1 V in full sunlight (1 AU). The thermoelectric device, a commercial off-the-shelf system 1.9 mm thick, generates a current of 20 mA at a potential of approximately 0.8 V when the photovoltaic side is at a temperature of 80 °C and the storage-battery side at a temperature of 45 °C. The battery is a 1 mm thick Li/LiPON/LiCoO solid-state multilayer system capable of delivering 20 - 50 mW of power during the 1/2 hour of ellipse time typically encountered in low Earth orbit. The photovoltaic cells and thermoelectric devices are integrated using a thermally conductive silver epoxy, while the battery is encased in aluminum. The power tile has been tested in an X-25 solar simulator and has been shown to function in a variety of conditions. Ongoing work includes miniaturizing the charge control electronics, integrating true microthermoelectric devices, and extended lifetime testing.

This work was done by Jay Whitacre, Jean-Pierre Fleurial, Mohammed Mojarradi, Travis Johnson, Margaret Amy Ryan, Ratnakumar Bugga, William West, Subbarao Surampudi, and Julian Blosiu of Caltech for NASA's Jet Propulsion Laboratory.

In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to

Intellectual Assets Office
JPL
Mail Stop 202-233
4800 Oak Grove Drive
Pasadena, CA 91109
(818) 354-2240
E-mail: This email address is being protected from spambots. You need JavaScript enabled to view it.

Refer to NPO-30433.


Photonics Tech Briefs Magazine

This article first appeared in the January, 2004 issue of Photonics Tech Briefs Magazine.

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