Planar two-dimensional arrays of thermopiles intended for use as thermal-imaging detectors are to be fabricated by a process that includes surface micromachining. These thermopile arrays are designed to perform better than do prior two-dimensional thermopile arrays.

The lower performance of prior two-dimensional thermopile arrays is attributed to the following causes:

  • The thermopiles are made from low-performance thermoelectric materials.
  • The devices contain dielectric supporting structures, the thermal conductances of which give rise to parasitic losses of heat from detectors to substrates.
  • The bulk-micromachining processes sometimes used to remove substrate material under the pixels, making it difficult to incorporate low-noise readout electronic circuitry.
  • The thermoelectric lines are on the same level as the infrared absorbers, thereby reducing fill factor.
  • The improved pixel design of a thermopile array of the type under development is expected to afford enhanced performance by virtue of the following combination of features:
  • Surface-micromachined detectors are thermally isolated through suspension above readout circuitry.
  • The thermopiles are made of such high-performance thermoelectric materials as Bi-Te and Bi-Sb-Te alloys.
  • Pixel structures are supported only by the thermoelectric materials: there are no supporting dielectric structures that could leak heat by conduction to the substrate.
  • To maximize response, there are many thin thermoelectric legs only about 2 µm wide.

The thermoelectric legs are hidden under a silicon nitride infrared-absorbing structure, making a large fill factor for the absorber.

The Removal of Sacrificial Layers during fabrication thermally isolates the absorber, reducing heat leaks and thereby increasing responsivity. The thinness of the thermoelectric lines and absorber makes response time short.

The figure depicts selected aspects of four-pixel example of the improved design. The device can be characterized as a three-layer structure (or a four-layer structure if one includes the substrate). During fabrication, the device also contains two sacrificial layers, typically composed of polyimide. One sacrificial layer is located over interconnecting wires and under the thermoelectric lines; the other sacrificial layer is located over the thermoelectric lines and under the silicon nitride infrared absorber. After the detector structure is fabricated, the sacrificial layers are removed, typically by etching in an oxygen plasma. The removal of the sacrificial layers is what provides the thermal isolation mentioned above.

The design facilitates maximization of the number of thermoelectric legs to increase the responsivity and the electrical impedance of the detector. Using 2-μm widths and 2-μm spacings of thermoelectric lines, it is possible to place about 11 thermocouples under a 50-μm-wide pixel.

Absorption of infrared radiation is enhanced by use of a quarter-wave cavity. In each pixel, a thin layer of metal on the silicon nitride layer constitutes a front absorber, while the thermoelectric legs and interconnecting wires, together, constitute a back-side mirror.

At the time of reporting the information for this article, partially completed detectors (lacking the silicon nitride absorbers) of 100-µm pixel size had been built and tested. The results of the test indicate a pixel resistance of 250 kΩ, responsivity of 1.5 kV/W, response time of 1.7 ms, and detectivity (D*) of 2.4 x 108 cm·Hz1/2/W. Improvements are ongoing.

This work was done by Marc C. Foote of Caltech for NASA's Jet Propulsion Laboratory.

In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to

Intellectual Property group
JPL
Mail Stop 202-233
4800 Oak Grove Drive
Pasadena, CA 91109
(818) 354-2240

Refer to NPO-30124.



This Brief includes a Technical Support Package (TSP).
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Surface-Micromachined Planar Arrays of Thermopiles

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