A methodology for designing highly accurate readout circuits for infrared (IR) image detectors that have large pixel detector capacitances (of the order of tens of picofarads) and are required to operate with short exposure times (<100 µs) has been devised. In this context, "highly accurate" signifies capable of (1) nearly linear response over a wide dynamic range with (2) little or no image lag ("ghost" image readout attributable to capacitive retention of charge from preceding image frames), and (3) low readout noise. The methodology has been used to enhance the performance of NASA's Airborne Visible/Infrared Imaging Spectrometer (AVIRIS), and is expected to satisfy an increasing need for highly accurate readout circuits in other applications, including other imaging spectrometers and infrared video cameras now undergoing development.

The Stages Following the BDI Input Circuit are optimized, pursuant to equations for response times, to minimize image lag and other errors.

The methodology improves upon the prior art in two main ways:

  • It provides for refinement of the design of pixel amplifiers and other pixel readout circuitry on the basis of understanding gained through analysis of previously neglected second-order electronic effects - including notably image lag related to abrupt transitions of signal currents.
  • It incorporates the concept that, at least in principle, it should be possible to derive an algorithm to correct for image lag.

The readout circuitry for each pixel, as contemplated in this methodology, is based on that of the AVIRIS. This circuitry (see figure) features a conventional buffered-direct-injection (BDI) input circuit followed by amplifier stages of optimized design. Similar BDI readout circuits designed according to older methodology generate residual image signals when bright images are followed by dark images, giving rise to errors in the estimates of the dark images; and when dark images are followed by bright images, responses are oscillatory, giving rise to errors in estimates of the bright images. The errors are functions of time and detector capacitances.

The analysis of second-order effects yields closed-form expressions for response times for both low-to-high and high-to-low transitions. These expressions are what make it possible to optimize pixel amplifier design and to choose appropriate feedback capacitors to minimize circuit error and image lag. In an initial application of this part of the methodology to a linear array of photodetectors for the AVIRIS, it was found that the signal-to-noise ratio was increased by a factor of 2 to 3, relative to older designs, and that image lag was reduced to less than 10 percent over the entire dynamic range of pixel signal current from 10 pA to 10 nA. The measured input-referred noise was found to be less than 300 electrons.

A first-order analysis has been performed in an initial effort to develop software to compensate for image lag. This analysis yields recursive equations that can be used to estimate and correct for errors. Software that implements these equations has been tested on AVIRIS readout data and found to reduce errors but also to occasionally introduce new errors. The inability to eliminate all errors has been attributed to inadequate mathematical modeling of circuit behavior, including inaccuracies in estimates of response times. To achieve greater accuracy, it would be necessary to derive equations of greater complexity, based on a second-order analysis. Of course, it would be more difficult to implement such equations in software.

This work was done by Bedabrata Pain of Caltech for NASA's Jet Propulsion Laboratory.


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Readout for Fast IR Imaging With Large Detector Capacitance

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This article first appeared in the July, 2000 issue of Photonics Tech Briefs Magazine.

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