Figure 1 shows a simplified block diagram of an improved opto- electronic system for locking the phase of one laser to that of another laser with an adjustable offset frequency specified by the user. In comparison with prior systems, this system exhibits higher performance (including higher stability) and is much easier to use. The system is based on a field-programmable gate array (FPGA) and operates almost entirely digitally; hence, it is easily adaptable to many different systems. The system achieves phase stability of less than a microcycle. It was developed to satisfy the phase-stability requirement for a planned spaceborne gravitational-wave-detecting heterodyne laser interferometer (LISA). The system has potential terrestrial utility in communications, lidar, and other applications.
The present system includes a fast phasemeter that is a companion to the microcycle-accurate one described in "High-Accuracy, High-Dynamic-Range Phase- Measurement System" (NPO-41927), NASA Tech Briefs, Vol. 31, No. 6 (June 2007), page 22. In the present system (as in the previously reported one), beams from the two lasers (here denoted the master and slave lasers) interfere on a photodiode. The heterodyne photodiode output is digitized and fed to the fast phasemeter, which produces suitably conditioned, low-latency analog control signals which lock the phase of the slave laser to that of the master laser. These control signals are used to drive a thermal and a piezoelectric transducer that adjust the frequency and phase of the slave-laser output.
The output of the photodiode is a heterodyne signal at the difference between the frequencies of the two lasers. (The difference is currently required to be less than 20 MHz due to the Nyquist limit of the current sampling rate. We foresee few problems in doubling this limit using current equipment.) Within the phasemeter, the photodiode- output signal is digitized to 15 bits at a sampling frequency of 40 MHz by use of the same analog-to-digital converter (ADC) as that of the previously reported phasemeter. The ADC output is passed to the FPGA, wherein the signal is demodulated using a digitally generated oscillator signal at the offset locking frequency specified by the user. The demodulated signal is low-pass filtered, decimated to a sample rate of 1 MHz, then filtered again. The decimated and filtered signal is converted to an analog output by a 1 MHz, 16-bit digital-to-analog converters. After a simple low-pass filter, these analog signals drive the thermal and piezoelectric transducers of the laser.
Although the system phase-locks the two lasers to within a microcycle, in the original application, there is an occasional need to analyze the performance of the phasemeter in the presence of noise in the difference between the phases and frequencies between the two lasers. This system includes a subsystem, based on a pseudorandom-number generator, that can add an adjustable amplitude phase noise characterized by a uniform, Gaussian, or 1/ƒ distributions (where ƒ denotes frequency). Figure 2 shows the performance of the phase-locking system, and also noise added by the pseudo-random noise generator to mimic that of free-running lasers.
This work was done by Daniel Shaddock and Brent Ware of Caltech for NASA's Jet Propulsion Laboratory.