A two-stage variable sample-rate conversion (SRC) system has been proposed as part of a digital signal-processing system in a digital communication radio receiver that utilizes a variety of data rates. The proposed system would be used as an interface between (1) an analog-to-digital converter used in the front end of the receiver to sample an intermediate-frequency signal at a fixed input rate and (2) digitally implemented tracking loops in subsequent stages that operate at various sample rates that are generally lower than the input sample rate.

This Two-Stage System would be capable of converting from an input sample rate to a desired lower output sample rate that could be variable and not necessarily a rational fraction of the input rate.
Traditional SRC systems are constructed from multirate building blocks that typically include integer/fractional decimation filter subsystems. Traditional SRC systems work well when SRC factors are fixed at rational values, but not when SRC factors vary or are irrational.

The input to the proposed two-stage SRC system would be the input sampled signal, r[l] = rd[l] + ru[l], where rd[l] is the desired component (the signal of interest); ru[l] is the undesired component, which may include noise plus out-of-desired-frequency-band artifacts of the sampling process (alias components); and l is an integer denoting the current sample time index. In the proposed system (see figure), the first stage would be a fractional decimation filter subsystem that would suppress the alias components and would effect a coarse interpolation in the sense that it would convert to a sample rate approximating the desired value. The second stage would effect a fine interpolation from the approximate to the desired sample rate by means of a fit to a temporally varying interpolation kernel.

Several approaches to implementation of both the coarse- and the fine- interpolation stages have been studied theoretically and their strengths and weaknesses have been examined by analyzing results of computational simulations. For the coarse-interpolation stage, single and cascaded sets of filters and decimation filter subsystems were considered, with emphasis on the cascaded subsystems because of their modularity. For the fine- interpolation stage, the computationally efficient Farrow structure (a multirate, continuously-variable-delay filter structure, a description of which would exceed the space available for this article) was used in conjunction with a variety of piecewise-polynomial interpolation kernels, with emphasis on the cubic B-spline kernel on account of its commendable performance.

This work was done by Andre Tkacenko of Caltech for NASA’s Jet Propulsion Laboratory.

The software used in this innovation is available for commercial licensing. Please contact Karina Edmonds of the California Institute of Technology at (626) 395-2322. Refer to NPO-44539.


NASA Tech Briefs Magazine

This article first appeared in the September, 2009 issue of NASA Tech Briefs Magazine.

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