Efforts are under way to apply the concept of evolvable hardware (EHW) to compensate for variations, with temperature, in the operational characteristics of electronic circuits. To maintain the required functionality of a given circuit at a temperature above or below the nominal operating temperature for which the circuit was originally designed, a new circuit would be evolved; moreover, to obtain the required functionality over a very wide temperature range, there would be evolved a number of circuits, each of which would satisfy the performance requirements over a small part of the total temperature range.
An AND Gate evolved for 27 °C gave a spurious response that increased as temperature was increased to 180 °C. A new AND gate was then evolved for 180 °C.
The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles, namely, "Reconfigurable Arrays of Transistors for Evolvable Hardware" (NPO-20078), Vol. 25, No. 2 (February 2001), page 36; "Evolutionary Automated Synthesis of Electronic Circuits" (NPO-20535), Vol. 26, No. 7 (July 2002), page 37; "Designing Reconfigurable Antennas Through Hardware Evolution" (NPO-20666), Vol. 26, No. 7 (July 2002), page 38; "'Morphing' in Evolutionary Synthesis of Electronic Circuits" (NPO-20837), Vol. 26, No. 8 (August 2002), page 31;"Mixtrinsic Evolutionary Synthesis of Electronic Circuits" (NPO-20773) Vol. 26, No. 8 (August 2002), page 32; and "Synthesis of Fuzzy-Logic Circuits in Evolvable Hardware" (NPO-21095) Vol. 26, No. 11 (November 2002), page 38.

To recapitulate from the cited prior articles: EHW is characterized as evolutionary in a quasi-genetic sense. The essence of EHW is to construct and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The connection and disconnection can be effected by use of field programmable transistor arrays (FPTAs). The evolution is guided by a search and optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by mathematical modeling (that is, computational simulation) only, tested in real hardware, or tested in combinations of computational simulation and real hardware.

In principle, the application of the EHW concept to temperature compensation could be straightforward: If, for example, a change in temperature were to change the functionality of an EHW circuit such as to cause a measure of the error in the functionality to exceed a specified threshold, then the process of evolutionary automated synthesis could be resumed, possibly taking account of previous circuit configurations in the population. The evolutionary process would be stopped once an evolved circuit performed with an error below the threshold.

The application of the EHW concept to temperature compensation has been demonstrated in computational simulations and in experiments on real FPTAs at controlled temperatures. In one set of computational simulations, an AND gate was evolved to function at a temperature of 27ºC. As shown in the upper part of the figure, its response deteriorated as the temperature was increased to 180ºC. The evolutionary process was then begun toward a new version of the circuit in the hope of restoring the desired AND-gate function at 180ºC. As shown in the lower part of the figure, the evolution yielded a close approximation of the desired result.

This work was done by Adrian Stoica of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Electronics/Computers category. NPO-21146