A fully integrated, front-end Ka-band monolithic microwave integrated circuit (MMIC) was developed that houses an LNA (low noise amplifier) stage, a down-conversion stage, and output buffer amplifiers. The MMIC design employs a two-step quadrature down-conversion architecture, illustrated in the figure, which results in improved quality of the down-converted IF quadrature signals. This is due to the improved sensitivity of this architecture to amplitude and phase mismatches in the quadrature down-conversion process. Current sharing results in reduced power consumption, while 3D-coupled inductors reduce the chip area. Improved noise figure is expected over previous SiGe-based, front-end designs.
This is the first SiGe-based receiver front-end that is capable of finding use in multiple transponder instrument programs. The design uses the latest IBM8HP SiGe process, thereby allowing for improved MMIC performance in the mm-wave regime. Improved performance is expected in terms of power consumption, quality of down-converted signals, and receiver noise figure over SiGe-based designs published by the Air Force Research Laboratory (AFRL) and the Army Research Lab (ARL).
This work was done by Jaikrishna Venkatesan and Narayan R. Mysoor of Caltech and Hossein Hashemi and Firooz Aflatouni of the University of Southern California for NASA’s Jet Propulsion Laboratory. For more information, download the Technical Support Package (free white paper) at www.techbriefs.com/tsp under the Electronics/Computers category. NPO-42708