Artifacts that are fabricated with the help of molecular-beam epitaxy (MBE) are undergoing development for use as dimensional calibration standards with sub-micron widths. Such standards are needed for calibrating instruments (principally, scanning electron microscopes and scanning probe microscopes) for measuring the widths of features in advanced integrated circuits. Dimensional calibration standards fabricated by an older process that involves lithography and etching of trenches in (110) surfaces of single-crystal silicon are generally reproducible to within dimensional tolerances of about 15 nm. It is anticipated that when the artifacts of the present type are fully developed, their critical dimensions will be reproducible to within 1 nm. These artifacts are expected to find increasing use in the semiconductor-device and integrated-circuit industries as the width tolerances on semiconductor devices shrink to a few nanometers during the next few years.
Unlike in the older process, one does not rely on lithography and etching to define the critical dimensions. Instead, one relies on the inherent smoothness and flatness of MBE layers deposited under controlled conditions and defines the critical dimensions as the thicknesses of such layers. An artifact of the present type is fabricated in two stages (see figure): In the first stage, a multilayer epitaxial wafer is grown on a very flat substrate. In the second stage, the wafer is cleaved to expose the layers, then the exposed layers are differentially etched (taking advantage of large differences between the etch rates of the different epitaxial layer materials).
The resulting structure includes narrow and well-defined trenches and a shelf with thicknesses determined by the thicknesses of the epitaxial layers from which they were etched. Eventually, it should be possible to add a third fabrication stage in which durable, electronically inert artifacts could be replicated in diamond-like carbon from a master made by MBE and etching as described above.
This work was done by Frank Grunthaner and Paula Grunthaner of Caltech and Charles Bryson III of Surface/Interface, Inc., for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Information Sciences category.
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