A class of proposed thermionic cooling devices would incorporate precise arrays of metal nanowires as electron emitters. The proposed devices could be highly miniaturized, enabling removal of heat from locations, very close to electronic devices, that have previously been inaccessible for heat-removal purposes. The resulting enhancement of removal of heat would enable operation of the devices at higher power levels and higher clock speeds. Moreover, the mass, complexity, and bulk of electronic circuitry incorporating these highly miniaturized cooling devices could be considerably reduced, relative to otherwise equivalent circuitry cooled by conventional electromechanical, thermoelectric, and fluidic means.

In thermionic cooling, one exploits the fact that because only the highest-energy electrons are thermionically emitted, collecting those electrons to prevent their return to the emitting electrode results in the net removal of heat from that electrode. Collection is effected by applying an appropriate positive bias potential to another electrode placed near the emitting electrode.

An Array of Nanowires would be coated with cesium and tested for effectivenessin thermionic cooling by use of an apparatus shown here in simplifiedschematic form.
The concept underlying the proposal is that the thermionic-emission current and, hence, the cooling effect attainable by use of an array of nanowires could be significantly greater than that attainable by use of a single emitting electrode or other electron-emitting surface. The wires in an array according to the proposal would protrude perpendicularly from a planar surface and their heights would be made uniform to within a subnanometer level of precision.

A process of growing metal nanotubes in alumina nanopores has already been demonstrated and would be incorporated into the following process for fabricating an array according to the proposal:

  1. An aluminum layer would be deposited on a silicon nitride membrane mesh substrate, the central portion of which would be covered with a silicon island.
  2. The aluminum layer would be anodized to grow an alumina nanopore template on the siliconisland portion.
  3. Metal nanowires would be grown inside the nanopores of the template by electrodeposition.
  4. The exposed surface of the template and nanowires would be subjected to chemical-mechanical polishing.
  5. The template would be etched away to expose the array of metal nanowires centered on the silicon island on the nitride membrane mesh substrate.

The bias potential would be applied to the anode and the temperature of the array (the cathode) would be measured by the thermistor. Because of the thermionic reduction of temperature is expected to be small in initial experiments, the sensitivity of measurement of this reduction would be enhanced by use of a lock-in technique in which the bias potential would be modulated and the variation in temperature measured at the modulation frequency.

This work was done by Eui-Hyeok Yang, Daniel Choi, Kirill Shcheglov, and Yoshikazu Hishinuma of Caltech for NASA's Jet Propulsion Laboratory.

In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to:

Innovative Technology Assets Management

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Refer to NPO-42101, volume and number of this NASA Tech Briefs issue, and the page number.