Using a Commercial Ethernet PHY Device in a Radiation Environment

This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation- tested and free of destructive latchup errors.

The commercial Ethernet PHY’s own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY’s input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device’s power and ground) from taking down the board’s main power.

Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY’s interrupt line, and the status of the Ethernet’s switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn’t work, the logic device powercycles the FPGA by toggling the regulator’s enable input. This should clear almost all radiation induced errors provided the device is not latched up.

This work was done by Jeremy Parks, Michael Arani, and Roberto Arroyo of Honeywell Aerospace for Johnson Space Center. For further information, contact the JSC Innovation Partnerships Office at (281) 483-3809.

Title to this invention has been waived under the provisions of the National Aeronautics and Space Act {42 U.S.C. 2457(f)}, to Honeywell. Inquiries concerning licenses for its commercial development should be addressed to:

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