Wide temperature and extreme environment electronics are crucial to future missions. These missions will not have the weight and power budget for heavy harnesses and large, inefficient warm boxes. In addition, extreme environment electronics, by their inherent nature, allow operation next to sensors in the ambient environment, reducing noise and improving precision over the warm-box-based systems employed today.
On-chip integrated circuit processes usually have absolute tolerances in excess of 10% without post-fabrication trimming. This tolerance is often insufficient in sensing applications, especially across temperature. This necessitates either a trim step (at risk and expense) or an off-chip resistor (which involves a pad, and risk of short-circuit). In high-reliability systems, the drawn current in case of a short-circuit is an important consideration.
The proposed design uses a type of current mirror whose input is dependent upon the present operating conditions. A current limit for extreme environments utilizing this methodology has not appeared in the literature at the time of this reporting.
Extreme environment electronics are valuable to a number of disciplines, including military/aerospace, automotive, scientific research applications, and energy, among others.
This work was done by Jeremy A. Yager of Caltech for NASA’s Jet Propulsion Laboratory. NPO-48522
This Brief includes a Technical Support Package (TSP).
Precision Current Input With Well-Defined Current Limiting for Extreme Environment Applications
(reference NPO48522) is currently available for download from the TSP library.
Don't have an account?
Overview
The document discusses a novel technology developed at NASA's Jet Propulsion Laboratory (JPL) aimed at improving the precision of current inputs in integrated circuits, particularly for applications in extreme environments. Traditional on-chip integrated circuit processes often exhibit absolute tolerances exceeding 10%, which can be inadequate for sensing applications, especially when temperature variations are considered. This limitation necessitates either a post-fabrication trimming step, which carries risks and costs, or the use of off-chip resistors, which can introduce additional risks such as short-circuits.
To address these challenges, the document presents a method for implementing a non-intrusive, well-defined current limiting mechanism. This mechanism is crucial for high-reliability systems where the drawn current during a short-circuit scenario is a significant concern. The proposed solution utilizes on-chip currents to set a current limit, ensuring that the output current (I_OUT) does not exceed a predefined threshold (I_OC), even in the event of a short-circuit.
The theory of operation is explained through a schematic representation of the current input circuit. In normal operation, an off-chip resistor is driven by a transistor to a reference voltage, while the gate of another transistor is pulled to ground, allowing for controlled current flow. In current-limiting mode, a Wilson current mirror configuration is employed, which includes multiple transistors working together to maintain the output current within safe limits.
Additionally, the document highlights the use of a Minch bias generator, which provides a temperature-compensated bias voltage, further enhancing the circuit's performance in extreme conditions. This biasing technique is essential for ensuring consistent operation across varying temperatures, which is critical for aerospace applications.
Overall, the document emphasizes the importance of precision in current input systems for aerospace and other high-reliability applications. It outlines the innovative approaches taken by JPL to mitigate risks associated with traditional methods, thereby contributing to advancements in technology that can withstand extreme environmental challenges. The research is part of NASA's broader efforts to develop technologies with potential applications beyond aerospace, promoting technological transfer and innovation.
